Simulation and test of through silicon vias impacted by large current pulse

The failure mechanism of through silicon vias impacted by large current pulse is reported. A theoretical model has been built to describe how TSVs fails when impacted by large current pulse. The theoretical model is then solved by applying COMSOL Multiphysics and the weak points of the TSV have been pointed out. By applying the large current pulse generating and testing system, an experiment has been done to verify the theoretical model. The results show that although the TSVs may be broken down when impacted by large current pulse, it can still be function by using several TSVs in parallel.