TY - GEN
T1 - Photonics-Assisted Complex-Valued Discrete Fourier Transform Processor Based on Temporal Computing
AU - Yu, Weizhen
AU - Wang, Bin
AU - Zhang, Weifeng
N1 - Publisher Copyright:
© 2023 IEEE.
PY - 2023
Y1 - 2023
N2 - In this paper, we propose and experimentally demonstrate a photonics-assisted complex-valued discrete Fourier transform (DFT) processor based on temporal computing. In the proposed DFT processor, the complex-valued input data and the orthogonal basis are encoded in sequence on an optical carrier via two high-speed dual-drive Mach-Zehnder modulators (DD-MZMs). By precisely controlling the synchronization time of the input data and orthogonal basis loading, the complex-valued multiplication operation is performed in the time domain. An optical hybrid is used to implement coherent detection, and two low-speed photodetectors are used to perform the complex-valued accumulation operation. As a demonstration, 32-points complex-valued DFT is performed, and the normalized root mean square error (NRMSE) is as small as 0.0133. In addition, a 16\times 32 pixels image is employed to implement 2D DFT, which achieves an NRMSE as small as 0.0065. The proposed DFT processor holds unique advantages including high throughput and low latency, which is potential to be widely used in artificial intelligence computing and radar signal processing systems.
AB - In this paper, we propose and experimentally demonstrate a photonics-assisted complex-valued discrete Fourier transform (DFT) processor based on temporal computing. In the proposed DFT processor, the complex-valued input data and the orthogonal basis are encoded in sequence on an optical carrier via two high-speed dual-drive Mach-Zehnder modulators (DD-MZMs). By precisely controlling the synchronization time of the input data and orthogonal basis loading, the complex-valued multiplication operation is performed in the time domain. An optical hybrid is used to implement coherent detection, and two low-speed photodetectors are used to perform the complex-valued accumulation operation. As a demonstration, 32-points complex-valued DFT is performed, and the normalized root mean square error (NRMSE) is as small as 0.0133. In addition, a 16\times 32 pixels image is employed to implement 2D DFT, which achieves an NRMSE as small as 0.0065. The proposed DFT processor holds unique advantages including high throughput and low latency, which is potential to be widely used in artificial intelligence computing and radar signal processing systems.
KW - Optical discrete Fourier transform
KW - complex-valued computing
KW - optical signal/image processing
KW - temporal computing
UR - http://www.scopus.com/inward/record.url?scp=85183307892&partnerID=8YFLogxK
U2 - 10.1109/ACP/POEM59049.2023.10369864
DO - 10.1109/ACP/POEM59049.2023.10369864
M3 - Conference contribution
AN - SCOPUS:85183307892
T3 - 2023 Asia Communications and Photonics Conference/2023 International Photonics and Optoelectronics Meetings, ACP/POEM 2023
BT - 2023 Asia Communications and Photonics Conference/2023 International Photonics and Optoelectronics Meetings, ACP/POEM 2023
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 2023 Asia Communications and Photonics Conference/2023 International Photonics and Optoelectronics Meetings, ACP/POEM 2023
Y2 - 4 November 2023 through 7 November 2023
ER -