Memory-aware NoC application mapping based on adaptive genetic algorithm

Yizhuo Wang*, Zhibiao Zhang, Lifu Huang, Weixing Ji

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

2 Citations (Scopus)

Abstract

Application mapping is one of the key problems of Network-on-Chip (NoC) design. To address the application mapping on NoC with distributed memory node, this paper proposes a static mapping strategy based on adaptive genetic algorithm (AGA), which is memory-aware. This strategy solves the problem raised by the memory node through a novel encoding method, and improves the performance through dynamic adjustment on crossover probability and mutation probability. Experimental results show that our strategy saves the communication energy cost by 3% to 6%, compared with the mapping strategy based on standard genetic algorithm (SGA), for the task graphs studied in this paper.

Original languageEnglish
Title of host publicationAlgorithms and Architectures for Parallel Processing - 15th International Conference, ICA3PP 2015, Proceedings
EditorsGregorio Martinez Perez, Albert Zomaya, Guojun Wang, Kenli Li
PublisherSpringer Verlag
Pages91-102
Number of pages12
ISBN (Print)9783319271187
DOIs
Publication statusPublished - 2015
Event15th International Conference on Algorithms and Architectures for Parallel Processing, ICA3PP 2015 - Zhangjiajie, China
Duration: 18 Nov 201520 Nov 2015

Publication series

NameLecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)
Volume9528
ISSN (Print)0302-9743
ISSN (Electronic)1611-3349

Conference

Conference15th International Conference on Algorithms and Architectures for Parallel Processing, ICA3PP 2015
Country/TerritoryChina
CityZhangjiajie
Period18/11/1520/11/15

Keywords

  • Adaptive genetic algorithm
  • Application mapping
  • Memory-aware mapping
  • Network-on-Chip

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