Abstract
A low power wireless infrared transmitting system is presented for transmitting video signal. Using anti-fuse FPGA devices as Encoding/Decoding (ENDEC) core, and high speed serial infrared transceivers as transmission module in this system, the run length limited (RLL) code is deployed in FPGA as a channel ENDEC module to work together with other modules, including 10 buffer, serializer/deserializer, cycle redundancy checksum and scrambler/descrambler. Combined with AD/DA interface circuits, these modules compose an integrated demonstration system, in which the two-channel composited video signal can be orderly captured, encoded, emitted, decoded and displayed. The transmitting bandwidth of the system is up to 16 Mbit/s, but the power consumption of the infrared emitting module is low to 500 mW. Therefore it can be used as a wireless interface between the video capture equipment and the video processing system.
| Original language | English |
|---|---|
| Pages (from-to) | 930-934 |
| Number of pages | 5 |
| Journal | Guangxue Jingmi Gongcheng/Optics and Precision Engineering |
| Volume | 15 |
| Issue number | 6 |
| Publication status | Published - Jun 2007 |
Keywords
- Anti-fuse FPGA
- Low power design
- Wireless infrared transmitting