LDPC codes for low-complexity analog decoders

Hao Zheng, Xuhui Ding, Zhiyuan Wang, Yimin Li, Haikun Luo

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

3 Citations (Scopus)

Abstract

Compared with their digital counterparts, LDPC analog decoders own higher power efficiency which is suitable for low-power-consumptions applications. However, the high designing complexity of analog decoders with long block length has impeded their real-world applications. This paper presents a method to construct LDPC codes that can lower the designing complexity significantly by using identical models to form the whole decoder, as well as rules that codes should satisfy. Simulation results show that the proposed LDPC codes could lower the designing complexity with little performance lose and have better error-correcting performance than codes in CCSDS standard.

Original languageEnglish
Title of host publicationProceedings of the 2015 10th International Conference on Communications and Networking in China, CHINACOM 2015
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages167-171
Number of pages5
ISBN (Electronic)9781479987955
DOIs
Publication statusPublished - 22 Jun 2016
Event10th International Conference on Communications and Networking in China, CHINACOM 2015 - Shanghai, China
Duration: 15 Aug 201517 Aug 2015

Publication series

NameProceedings of the 2015 10th International Conference on Communications and Networking in China, CHINACOM 2015

Conference

Conference10th International Conference on Communications and Networking in China, CHINACOM 2015
Country/TerritoryChina
CityShanghai
Period15/08/1517/08/15

Keywords

  • Factor graphs
  • Identical building block
  • LDPC codes
  • Low-complexity analog decoders

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