Abstract
This paper presents the fabrication and characterization of a high-density multilayer stacked metal-insulator-metal (MIM) capacitor based on a novel process of depositing the MIM multilayer on pillars followed by polishing and selective etching steps to form a stacked capacitor with merely three photolithography steps. In this paper, the pillars were made of glass to prevent substrate loss, whereas an oxide-nitride-oxide dielectric was employed for lower leakage, better voltage/frequency linearity, and better stress compensation. MIM capacitors with six dielectric layers were successfully fabricated, yielding capacitance density of 3.8 fF/>m2, maximum capacitance of 2.47 nF, and linear and quadratic voltage coefficients of capacitance below 21.2 ppm/V and 2.31 ppm/V2. The impedance was measured from 40 Hz to 3 GHz, and characterized by an analytically derived equivalent circuit model to verify the radio frequency applicability. The multilayer stacking-induced plate resistance mismatch and its effect on the equivalent series resistance (ESR) and effective capacitance was also investigated, which can be counteracted by a corrected metal thickness design. A low ESR of 800 mμ was achieved, whereas the self-resonance frequency was >760 MHz, successfully demonstrating the feasibility of this method to scale up capacitance densities for high-quality-factor, high-frequency, and large-value MIM capacitors..
Original language | English |
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Article number | 6824796 |
Pages (from-to) | 2302-2308 |
Number of pages | 7 |
Journal | IEEE Transactions on Electron Devices |
Volume | 61 |
Issue number | 7 |
DOIs | |
Publication status | Published - Jul 2014 |
Externally published | Yes |
Keywords
- Capacitance density
- equivalent series resistance (ESR)
- metal-insulator-metal (MIM) capacitor
- multilayer stack
- polishing
- radio frequency (RF) passive device model
- selective etching