TY - GEN
T1 - Implementation of spaceborne SAR imaging processor based on FPGA
AU - Yizhuang, Xie
AU - Teng, Long
PY - 2008
Y1 - 2008
N2 - With the rapid development of FPGA and its technology characteristic, this paper puts forward that FPGA is an effective and realizable technical approach for future spaceborne SAR imaging processor. With the ready-researched FPGA processor, the implementation architecture of spaceborne SAR imaging processor is studied. Further more, R-D quick look algorithm of spaceborne SAR is analyzed and mapped to the FPGA processor, each processing node of the FPGA processor uses different implementation architectures to image with the spaceborne SAR simulation raw data under the way of pipeline processing.
AB - With the rapid development of FPGA and its technology characteristic, this paper puts forward that FPGA is an effective and realizable technical approach for future spaceborne SAR imaging processor. With the ready-researched FPGA processor, the implementation architecture of spaceborne SAR imaging processor is studied. Further more, R-D quick look algorithm of spaceborne SAR is analyzed and mapped to the FPGA processor, each processing node of the FPGA processor uses different implementation architectures to image with the spaceborne SAR simulation raw data under the way of pipeline processing.
UR - http://www.scopus.com/inward/record.url?scp=67249095697&partnerID=8YFLogxK
U2 - 10.1109/ICOSP.2008.4697613
DO - 10.1109/ICOSP.2008.4697613
M3 - Conference contribution
AN - SCOPUS:67249095697
SN - 9781424421794
T3 - International Conference on Signal Processing Proceedings, ICSP
SP - 2318
EP - 2321
BT - 2008 9th International Conference on Signal Processing, ICSP 2008
T2 - 2008 9th International Conference on Signal Processing, ICSP 2008
Y2 - 26 October 2008 through 29 October 2008
ER -