Abstract
For the requirement that software debugging is quite difficult for dedicate parallel processing system consisting by multiple digital signal processor (DSP), concept of system-level debugging was proposed. The basic task and method of system-level debugging was discussed based on the hierarchical shared bus hardware structure model. A system level software debugger was designed and implemented with some key technology including hierarchical data structure, static symbol table auto-generation and extendable low level interface. This debugger makes it easy for system and global level debugging of large DSP processing array.
| Original language | English |
|---|---|
| Pages (from-to) | 855-858 |
| Number of pages | 4 |
| Journal | Beijing Ligong Daxue Xuebao/Transaction of Beijing Institute of Technology |
| Volume | 31 |
| Issue number | 7 |
| Publication status | Published - Jul 2011 |
Keywords
- Parallel processing system
- Signal processor
- Software debugger