Fuzzy Flip-Flops and their Applications to Fuzzy Memory Element and Circuit Design using FPGA

Shin Ichi Yoshida; Yasufumi Takama; Kaoru Hirota

doi:10.20965/jaciii.2000.p0380

Fuzzy Flip-Flops and their Applications to Fuzzy Memory Element and Circuit Design using FPGA

Shin Ichi Yoshida, Yasufumi Takama, Kaoru Hirota

Tokyo Institute of Technology

Research output: Contribution to journal › Article › peer-review

2 Citations (Scopus)

Abstract

D, T, and SR fuzzy flip-flops are proposed and their characteristics are shown in four - max-min. algebraic, bounded, drastic - logical operation systems. The circuits of the proposed flip-flops are designed and simulated on a Synopsys circuit simulator. The result of synthesis show the areas of D, T, SR fuzzy flip-flops are nearly 0, 2/3 1/2 of that of conventional JK fuzzy flip-flops and the delay times of D, T, SR fuzzy flip-flops are nearly 0T 2/3, 2/3 of that of the JK type. Moreover, max-min fuzzy memory element based on functions required for memory is proposed independently of fuzzy flip-flops.

Original language	English
Pages (from-to)	380-386
Number of pages	7
Journal	Journal of Advanced Computational Intelligence and Intelligent Informatics
Volume	4
Issue number	5
DOIs	https://doi.org/10.20965/jaciii.2000.p0380
Publication status	Published - Sept 2000
Externally published	Yes

Keywords

FPGA
Fuzzy flip-flop
Fuzzy logic
Logic circuit
Memory element

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10.20965/jaciii.2000.p0380

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title = "Fuzzy Flip-Flops and their Applications to Fuzzy Memory Element and Circuit Design using FPGA",

abstract = "D, T, and SR fuzzy flip-flops are proposed and their characteristics are shown in four - max-min. algebraic, bounded, drastic - logical operation systems. The circuits of the proposed flip-flops are designed and simulated on a Synopsys circuit simulator. The result of synthesis show the areas of D, T, SR fuzzy flip-flops are nearly 0, 2/3 1/2 of that of conventional JK fuzzy flip-flops and the delay times of D, T, SR fuzzy flip-flops are nearly 0T 2/3, 2/3 of that of the JK type. Moreover, max-min fuzzy memory element based on functions required for memory is proposed independently of fuzzy flip-flops.",

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AU - Yoshida, Shin Ichi

AU - Takama, Yasufumi

AU - Hirota, Kaoru

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AB - D, T, and SR fuzzy flip-flops are proposed and their characteristics are shown in four - max-min. algebraic, bounded, drastic - logical operation systems. The circuits of the proposed flip-flops are designed and simulated on a Synopsys circuit simulator. The result of synthesis show the areas of D, T, SR fuzzy flip-flops are nearly 0, 2/3 1/2 of that of conventional JK fuzzy flip-flops and the delay times of D, T, SR fuzzy flip-flops are nearly 0T 2/3, 2/3 of that of the JK type. Moreover, max-min fuzzy memory element based on functions required for memory is proposed independently of fuzzy flip-flops.

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Fuzzy Flip-Flops and their Applications to Fuzzy Memory Element and Circuit Design using FPGA

Abstract

Keywords

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