Fully integrated Si:HfO2Negative Capacitance 2D-2D WSe2/SnSe2Subthermionic Tunnel FETs

Sadegh Kamaei; Ali Saeidi; Xia Liu; Carlotta Gastaldi; Clara Moldovan; Jurgen Brugger; Adrian M. Ionescu

doi:10.1109/ESSCIRC55480.2022.9911286

Fully integrated Si:HfO₂Negative Capacitance 2D-2D WSe2/SnSe₂Subthermionic Tunnel FETs

Sadegh Kamaei, Ali Saeidi, Xia Liu, Carlotta Gastaldi, Clara Moldovan, Jurgen Brugger, Adrian M. Ionescu

Swiss Federal Institute of Technology Lausanne

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

Abstract

We report the first experimental demonstration and performance characterization of a fully integrated negative capacitance (NC) WSe2/SnSe2 p-Type Tunnel FETs (TFETs), validating the use of NC as a technology booster to achieve a significantly improved sub-Thermionic electronic switch. A WSe2/SnSe2 TFET with sub-60 mV/dec subthreshold slope (SS) is employed as the baseline TFET and characterized by using internal metal as a gate. The universal boosting impact of an NC effect of silicondoped Hf02 on digital and analog performances of 2D/2D TFETs is reported. A sub-30 mV/dec point SS and 50 mV / dec average swing over 2.5 decades of current with Ion/Ioff> 104 at VD= 500 mV are reported. Moreover, the low-slope region and I60 figures of merit are extended by 1.5 orders of magnitude due to the internal voltage amplification of the NC. The NC area of the polarization characteristic of Si:Hf02 is extracted for all the investigated drain voltages based on the experimental data measured in DC mode. Importantly, the supply voltage is reduced by 0.3 V by NC to achieve the same output current, Ion. Our results fully demonstrate the combined merits of band-To-band-Tunneling in 2D/2D WSe2/SnSe2 heterostructure with NC as a universal performance booster for 2D Tunnel FETs, offering to future 2D platforms a path towards improved energy efficiency.

Original language	English
Title of host publication	ESSCIRC 2022 - IEEE 48th European Solid State Circuits Conference, Proceedings
Publisher	Institute of Electrical and Electronics Engineers Inc.
Pages	161-164
Number of pages	4
ISBN (Electronic)	9781665484947
DOIs	https://doi.org/10.1109/ESSCIRC55480.2022.9911286
Publication status	Published - 2022
Externally published	Yes
Event	48th IEEE European Solid State Circuits Conference, ESSCIRC 2022 - Milan, Italy Duration: 19 Sept 2022 → 22 Sept 2022

Publication series

Name	ESSCIRC 2022 - IEEE 48th European Solid State Circuits Conference, Proceedings

Conference

Conference	48th IEEE European Solid State Circuits Conference, ESSCIRC 2022
Country/Territory	Italy
City	Milan
Period	19/09/22 → 22/09/22

Keywords

2D/2D TFETs
NC 2D/2D TFETs
Negative capacitance
WSe2/SnSe2

UN SDGs

This output contributes to the following UN Sustainable Development Goals (SDGs)

Access to Document

10.1109/ESSCIRC55480.2022.9911286

Cite this

Kamaei, S., Saeidi, A., Liu, X., Gastaldi, C., Moldovan, C., Brugger, J., & Ionescu, A. M. (2022). Fully integrated Si:HfO₂Negative Capacitance 2D-2D WSe2/SnSe₂Subthermionic Tunnel FETs. In ESSCIRC 2022 - IEEE 48th European Solid State Circuits Conference, Proceedings (pp. 161-164). (ESSCIRC 2022 - IEEE 48th European Solid State Circuits Conference, Proceedings). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/ESSCIRC55480.2022.9911286

Kamaei, Sadegh ; Saeidi, Ali ; Liu, Xia et al. / Fully integrated Si:HfO₂Negative Capacitance 2D-2D WSe2/SnSe₂Subthermionic Tunnel FETs. ESSCIRC 2022 - IEEE 48th European Solid State Circuits Conference, Proceedings. Institute of Electrical and Electronics Engineers Inc., 2022. pp. 161-164 (ESSCIRC 2022 - IEEE 48th European Solid State Circuits Conference, Proceedings).

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title = "Fully integrated Si:HfO2Negative Capacitance 2D-2D WSe2/SnSe2Subthermionic Tunnel FETs",

abstract = "We report the first experimental demonstration and performance characterization of a fully integrated negative capacitance (NC) WSe2/SnSe2 p-Type Tunnel FETs (TFETs), validating the use of NC as a technology booster to achieve a significantly improved sub-Thermionic electronic switch. A WSe2/SnSe2 TFET with sub-60 mV/dec subthreshold slope (SS) is employed as the baseline TFET and characterized by using internal metal as a gate. The universal boosting impact of an NC effect of silicondoped Hf02 on digital and analog performances of 2D/2D TFETs is reported. A sub-30 mV/dec point SS and 50 mV / dec average swing over 2.5 decades of current with Ion/Ioff> 104 at VD= 500 mV are reported. Moreover, the low-slope region and I60 figures of merit are extended by 1.5 orders of magnitude due to the internal voltage amplification of the NC. The NC area of the polarization characteristic of Si:Hf02 is extracted for all the investigated drain voltages based on the experimental data measured in DC mode. Importantly, the supply voltage is reduced by 0.3 V by NC to achieve the same output current, Ion. Our results fully demonstrate the combined merits of band-To-band-Tunneling in 2D/2D WSe2/SnSe2 heterostructure with NC as a universal performance booster for 2D Tunnel FETs, offering to future 2D platforms a path towards improved energy efficiency.",

keywords = "2D/2D TFETs, NC 2D/2D TFETs, Negative capacitance, WSe2/SnSe2",

author = "Sadegh Kamaei and Ali Saeidi and Xia Liu and Carlotta Gastaldi and Clara Moldovan and Jurgen Brugger and Ionescu, {Adrian M.}",

note = "Publisher Copyright: {\textcopyright} 2022 IEEE.; 48th IEEE European Solid State Circuits Conference, ESSCIRC 2022 ; Conference date: 19-09-2022 Through 22-09-2022",

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series = "ESSCIRC 2022 - IEEE 48th European Solid State Circuits Conference, Proceedings",

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Kamaei, S, Saeidi, A, Liu, X, Gastaldi, C, Moldovan, C, Brugger, J & Ionescu, AM 2022, Fully integrated Si:HfO₂Negative Capacitance 2D-2D WSe2/SnSe₂Subthermionic Tunnel FETs. in ESSCIRC 2022 - IEEE 48th European Solid State Circuits Conference, Proceedings. ESSCIRC 2022 - IEEE 48th European Solid State Circuits Conference, Proceedings, Institute of Electrical and Electronics Engineers Inc., pp. 161-164, 48th IEEE European Solid State Circuits Conference, ESSCIRC 2022, Milan, Italy, 19/09/22. https://doi.org/10.1109/ESSCIRC55480.2022.9911286

Fully integrated Si:HfO₂Negative Capacitance 2D-2D WSe2/SnSe₂Subthermionic Tunnel FETs. / Kamaei, Sadegh; Saeidi, Ali; Liu, Xia et al.
ESSCIRC 2022 - IEEE 48th European Solid State Circuits Conference, Proceedings. Institute of Electrical and Electronics Engineers Inc., 2022. p. 161-164 (ESSCIRC 2022 - IEEE 48th European Solid State Circuits Conference, Proceedings).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

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AU - Kamaei, Sadegh

AU - Saeidi, Ali

AU - Liu, Xia

AU - Gastaldi, Carlotta

AU - Moldovan, Clara

AU - Brugger, Jurgen

AU - Ionescu, Adrian M.

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N2 - We report the first experimental demonstration and performance characterization of a fully integrated negative capacitance (NC) WSe2/SnSe2 p-Type Tunnel FETs (TFETs), validating the use of NC as a technology booster to achieve a significantly improved sub-Thermionic electronic switch. A WSe2/SnSe2 TFET with sub-60 mV/dec subthreshold slope (SS) is employed as the baseline TFET and characterized by using internal metal as a gate. The universal boosting impact of an NC effect of silicondoped Hf02 on digital and analog performances of 2D/2D TFETs is reported. A sub-30 mV/dec point SS and 50 mV / dec average swing over 2.5 decades of current with Ion/Ioff> 104 at VD= 500 mV are reported. Moreover, the low-slope region and I60 figures of merit are extended by 1.5 orders of magnitude due to the internal voltage amplification of the NC. The NC area of the polarization characteristic of Si:Hf02 is extracted for all the investigated drain voltages based on the experimental data measured in DC mode. Importantly, the supply voltage is reduced by 0.3 V by NC to achieve the same output current, Ion. Our results fully demonstrate the combined merits of band-To-band-Tunneling in 2D/2D WSe2/SnSe2 heterostructure with NC as a universal performance booster for 2D Tunnel FETs, offering to future 2D platforms a path towards improved energy efficiency.

AB - We report the first experimental demonstration and performance characterization of a fully integrated negative capacitance (NC) WSe2/SnSe2 p-Type Tunnel FETs (TFETs), validating the use of NC as a technology booster to achieve a significantly improved sub-Thermionic electronic switch. A WSe2/SnSe2 TFET with sub-60 mV/dec subthreshold slope (SS) is employed as the baseline TFET and characterized by using internal metal as a gate. The universal boosting impact of an NC effect of silicondoped Hf02 on digital and analog performances of 2D/2D TFETs is reported. A sub-30 mV/dec point SS and 50 mV / dec average swing over 2.5 decades of current with Ion/Ioff> 104 at VD= 500 mV are reported. Moreover, the low-slope region and I60 figures of merit are extended by 1.5 orders of magnitude due to the internal voltage amplification of the NC. The NC area of the polarization characteristic of Si:Hf02 is extracted for all the investigated drain voltages based on the experimental data measured in DC mode. Importantly, the supply voltage is reduced by 0.3 V by NC to achieve the same output current, Ion. Our results fully demonstrate the combined merits of band-To-band-Tunneling in 2D/2D WSe2/SnSe2 heterostructure with NC as a universal performance booster for 2D Tunnel FETs, offering to future 2D platforms a path towards improved energy efficiency.

KW - 2D/2D TFETs

KW - NC 2D/2D TFETs

KW - Negative capacitance

KW - WSe2/SnSe2

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Kamaei S, Saeidi A, Liu X, Gastaldi C, Moldovan C, Brugger J et al. Fully integrated Si:HfO₂Negative Capacitance 2D-2D WSe2/SnSe₂Subthermionic Tunnel FETs. In ESSCIRC 2022 - IEEE 48th European Solid State Circuits Conference, Proceedings. Institute of Electrical and Electronics Engineers Inc. 2022. p. 161-164. (ESSCIRC 2022 - IEEE 48th European Solid State Circuits Conference, Proceedings). doi: 10.1109/ESSCIRC55480.2022.9911286