Abstract
This paper gives an overview of fractional-N frequency synthesis with design perspectives focusing on ΔΣ fractional-N phase-locked loops (PLLs). Spur generation and nonlinearity issue in the ΔΣ fractional-N PLLs are discussed with hardware results. High-order ΔΣ modulation with embedded FIR filtering is considered for low noise frequency generation. Also, various architectures of finite-modulo fractional-N PLLs are reviewed for alternative low noise design.
Original language | English |
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Title of host publication | 2011 IEEE International Symposium on Radio-Frequency Integration Technology, RFIT 2011 |
Pages | 125-128 |
Number of pages | 4 |
DOIs | |
Publication status | Published - 2011 |
Externally published | Yes |
Event | 4th IEEE International Symposium on Radio-Frequency Integration Technology, RFIT2011 - Beijing, China Duration: 30 Nov 2011 → 2 Dec 2011 |
Publication series
Name | 2011 IEEE International Symposium on Radio-Frequency Integration Technology, RFIT 2011 |
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Conference
Conference | 4th IEEE International Symposium on Radio-Frequency Integration Technology, RFIT2011 |
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Country/Territory | China |
City | Beijing |
Period | 30/11/11 → 2/12/11 |
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Rhee, W., Zhou, B., & Wang, Z. (2011). Fractional-N frequency synthesis: Overview and design perspectives. In 2011 IEEE International Symposium on Radio-Frequency Integration Technology, RFIT 2011 (pp. 125-128). Article 6141757 (2011 IEEE International Symposium on Radio-Frequency Integration Technology, RFIT 2011). https://doi.org/10.1109/RFIT.2011.6141757