FPGA implementation of covariance lattice LPC method using burg algorithm

Dongpeng Song, Shiwei Ren, Jin Zhuo, Hao Yang

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

1 Citation (Scopus)

Abstract

Aiming at the defects of classical lattice algorithm of speech signal linear prediction analysis, an improved algorithm for hardware implementation is proposed in this paper. The recursive form and symmetry characteristic is used to transform the formula of intermediate covariance and three mean square errors, which increase the speed of hardware calculation. The improved algorithm is implementation on Virtex5 XC5VLX110T FPGA, with the maximum frequency of 100.220MHz, while the latency is 9.54us and 17195 LUTs are utilized. The functional test shows that the normalized MSE between MATLAB and FPGA is 1.12% and the reflection factors are all smaller than 1, which means the system is stable.

Original languageEnglish
Title of host publication2017 9th International Conference on Advanced Infocomm Technology, ICAIT 2017
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages308-312
Number of pages5
ISBN (Electronic)9781538636282
DOIs
Publication statusPublished - 19 Jun 2018
Event9th International Conference on Advanced Infocomm Technology, ICAIT 2017 - Chengdu, China
Duration: 22 Nov 201724 Nov 2017

Publication series

Name2017 9th International Conference on Advanced Infocomm Technology, ICAIT 2017

Conference

Conference9th International Conference on Advanced Infocomm Technology, ICAIT 2017
Country/TerritoryChina
CityChengdu
Period22/11/1724/11/17

Keywords

  • FPGA
  • burg algorithm
  • lattice method
  • linear prediction analysis

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