Abstract
A new, easy, in situ technique for fabricating a two-dimensional graphene-silicon layered heterostructure has been developed to meet the demand for integration between graphene and silicon-based microelectronic technology. First, carbon atoms are stored in bulk iridium, and then silicon atoms are deposited onto the Ir(111) surface and annealed. With longer annealing times, the carbon atoms penetrate from the bulk iridium to the top of the silicon and eventually coalesce there into graphene islands. Atomically resolved scanning tunneling microscopy images, high-pass fast Fourier transform treatment and Raman spectroscopy demonstrate that the top graphene layer is intact and continuous, and beneath it is the silicon layer.
Original language | English |
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Article number | 084003 |
Journal | Nanotechnology |
Volume | 28 |
Issue number | 8 |
DOIs | |
Publication status | Published - 20 Jan 2017 |
Externally published | Yes |
Keywords
- STM
- grapheme
- layered heterostructures
- silicon
- two-dimension