TY - JOUR
T1 - Exploring the Impact of Critical Programmability on Controller Placement for Software-Defined Wide Area Networks
AU - Dou, Songshi
AU - Qi, Li
AU - Yao, Chao
AU - Guo, Zehua
N1 - Publisher Copyright:
© 1993-2012 IEEE.
PY - 2023/12/1
Y1 - 2023/12/1
N2 - Control latency is a critical concern for deploying Software-Defined Networking (SDN) into Wide Area Networks (WANs). A Software-Defined WAN (SD-WAN) can be divided into multiple domains controlled by multiple controllers with a logically centralized view. The control latency is related to the placement of controllers and mappings between switches and controllers. Existing solutions usually consider the propagation delay between switches and controllers as the evaluation metric and fail to consider many important factors of dynamic network states. In this paper, we propose ProgrammabilityExplorer (PE) to optimize the control latency in SD-WAN. Inspired by the selection of critical flows, which have a critical impact on network performance, PE considers the programmability of critical flows at switches and uses this metric to decide the placement of controllers and mappings between switches and controllers. Simulation results show that PE can reduce the control latency by up to 62.3%, 27.5%, 58.3%, and 61.7% under GÉANT, Abilene, Sprintlink, and Tiscali topologies respectively, compared with baseline algorithms.
AB - Control latency is a critical concern for deploying Software-Defined Networking (SDN) into Wide Area Networks (WANs). A Software-Defined WAN (SD-WAN) can be divided into multiple domains controlled by multiple controllers with a logically centralized view. The control latency is related to the placement of controllers and mappings between switches and controllers. Existing solutions usually consider the propagation delay between switches and controllers as the evaluation metric and fail to consider many important factors of dynamic network states. In this paper, we propose ProgrammabilityExplorer (PE) to optimize the control latency in SD-WAN. Inspired by the selection of critical flows, which have a critical impact on network performance, PE considers the programmability of critical flows at switches and uses this metric to decide the placement of controllers and mappings between switches and controllers. Simulation results show that PE can reduce the control latency by up to 62.3%, 27.5%, 58.3%, and 61.7% under GÉANT, Abilene, Sprintlink, and Tiscali topologies respectively, compared with baseline algorithms.
KW - Software-defined networking
KW - control latency
KW - controller placement
KW - critical programmability
KW - switch-controller mapping
KW - wide area networks
UR - http://www.scopus.com/inward/record.url?scp=85153535450&partnerID=8YFLogxK
U2 - 10.1109/TNET.2023.3252639
DO - 10.1109/TNET.2023.3252639
M3 - Article
AN - SCOPUS:85153535450
SN - 1063-6692
VL - 31
SP - 2575
EP - 2588
JO - IEEE/ACM Transactions on Networking
JF - IEEE/ACM Transactions on Networking
IS - 6
ER -