TY - GEN
T1 - Design on Parallel structure of DSSS receiver using FPGA
AU - Jie, Yang
AU - Zhu, Qian
PY - 2010
Y1 - 2010
N2 - In this paper, a novel high-speed parallel structure of low-pass filter for filtering and matched algorithm for searching synchronization in DSSS receiver is studied. We extend previous implements for introducing parallelism into the design of Direct Sequence Spread Spectrum (DSSS) receiver. Design techniques, such as parallel structure, optimized compressor cells and pipeline architecture for reducing the hardware resource consumption of multiplier, adder and look-up tables (LUT), use to realize a high-speed processing, precise synchronized and reconfigurable DSSS receiver. The design trade-offs analyzed with ISE 10.1 in detail, including the maximum frequency and number of resources of slices, bonded IOs and GCLKs, and implemented with a XC4VLX160 FPGA device.
AB - In this paper, a novel high-speed parallel structure of low-pass filter for filtering and matched algorithm for searching synchronization in DSSS receiver is studied. We extend previous implements for introducing parallelism into the design of Direct Sequence Spread Spectrum (DSSS) receiver. Design techniques, such as parallel structure, optimized compressor cells and pipeline architecture for reducing the hardware resource consumption of multiplier, adder and look-up tables (LUT), use to realize a high-speed processing, precise synchronized and reconfigurable DSSS receiver. The design trade-offs analyzed with ISE 10.1 in detail, including the maximum frequency and number of resources of slices, bonded IOs and GCLKs, and implemented with a XC4VLX160 FPGA device.
KW - DSSS receiver
KW - Low-pass filter
KW - Matched filter
KW - Parrallel structure
UR - http://www.scopus.com/inward/record.url?scp=78549239246&partnerID=8YFLogxK
U2 - 10.1109/WICOM.2010.5600990
DO - 10.1109/WICOM.2010.5600990
M3 - Conference contribution
AN - SCOPUS:78549239246
SN - 9781424437092
T3 - 2010 6th International Conference on Wireless Communications, Networking and Mobile Computing, WiCOM 2010
BT - 2010 6th International Conference on Wireless Communications, Networking and Mobile Computing, WiCOM 2010
T2 - 2010 6th International Conference on Wireless Communications, Networking and Mobile Computing, WiCOM 2010
Y2 - 23 September 2010 through 25 September 2010
ER -