Design of the high-speed, high-precision and large-scale data acquisition system

Xiaomin Hou*, Xiaohong Wang, Teng Long

*Corresponding author for this work

Research output: Contribution to conferencePaperpeer-review

Abstract

In this paper, the key techniques are analyzed during the implementation of the high-speed, high-precision and large-scale data acquisition system(DAS), including the implementation of SDRAM controller, clock circuit design, system anti-interference and etc. In the end, the high-speed, high-precision and large-scale DAS, based on PCI bus, is introduced. In the system, we choose AD9430 and high-speed large-scale SDRAM, design the control logic for the data sampling, access read/write(R/W). The test results of the system are given which prove the feasibility of the system.

Original languageEnglish
Pages563-567
Number of pages5
Publication statusPublished - 2004
Event2004 7th International Conference on Signal Processing Proceedings (ICSP'04) - Beijing, China
Duration: 31 Aug 20044 Sept 2004

Conference

Conference2004 7th International Conference on Signal Processing Proceedings (ICSP'04)
Country/TerritoryChina
CityBeijing
Period31/08/044/09/04

Keywords

  • CPLD A/D
  • Memory data acquisition
  • SDRAM

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