Abstract
In order to get the parameters of the signals rapidly in the wideband receivers, a new system with four pieces of field programming gate array (FPGA) was designed. This new system can accomplish FFT calculation, extract the parameters of the carrier frequency signals in the frequency domain, in turn, it can complete IFFT calculation and detect the parameters of the pulse signals in the time domain by using the method of distributing multi-bus, parallel and pipelining. Moreover, with the finite state machine technique, the program of the PCI local time sequence in the CPCI bus was presented and the control and conversion of the signal processing conditions were realized. The similar dual port RAM was demonstrated with eight pieces of 244 and some SRAM. The project has been passed checkup and may be applied in the practical engineering.
| Original language | English |
|---|---|
| Pages (from-to) | 636-640+658 |
| Journal | Beijing Ligong Daxue Xuebao/Transaction of Beijing Institute of Technology |
| Volume | 25 |
| Issue number | 7 |
| Publication status | Published - Jul 2005 |
Keywords
- Compact peripheral component interconnect bus
- Distributing multi-bus
- Field programming gate array
- Finite state machine
- Signal detection