Crack-Free Fabrication and Electrical Characterization of Coaxial Ultra-Low-Resistivity-Silicon Through-Silicon-Vias

Xue Luo, Lei Xiao, Xinghua Wang*

*Corresponding author for this work

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Abstract

Ultra-low-resistivity-silicon (ULRS) coaxial through-silicon-vias (TSVs) employ silicon pillar as the central conductor, which simplifies the fabrication process and exhibits good electrical characteristics. However, microcracks that may appear on silicon pillars degrade the reliability and electrical properties. In this work, the main cause of microcracks is investigated experimentally and an optimized fabrication process is proposed to avoid microcracks, which includes a two-step chemical mechanical polishing for frontside Benzocyclobutene overburden layer removal and a two-step backside TSVs reveal process featuring mechanical grinding with a safety margin followed by chemical mechanical polishing. Utilizing the proposed method, crack-free ULRS coaxial TSVs were successfully fabricated. In addition, the electrical properties of TSVs including I-V curves and S-parameters were characterized under various temperatures, and the results demonstrates that the coaxial TSVs exhibit good impedance matching and low insertion loss up to 50 GHz even under 125°C.

Original languageEnglish
Article number8865438
Pages (from-to)103-108
Number of pages6
JournalIEEE Transactions on Semiconductor Manufacturing
Volume33
Issue number1
DOIs
Publication statusPublished - Feb 2020

Keywords

  • Electrical properties
  • mechanical grinding
  • microcracks
  • process optimization
  • silicon pillar
  • ultra-low-resistivity-silicon (ULRS) through-silicon-via (TSV)

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Luo, X., Xiao, L., & Wang, X. (2020). Crack-Free Fabrication and Electrical Characterization of Coaxial Ultra-Low-Resistivity-Silicon Through-Silicon-Vias. IEEE Transactions on Semiconductor Manufacturing, 33(1), 103-108. Article 8865438. https://doi.org/10.1109/TSM.2019.2946883