Abstract
In order to build a fault-tolerant network, heterogeneous facilities are arranged in the network to prevent homogeneous faults from causing serious damage. This paper uses edge-colored graph to investigate the features of a network topology which is survivable after a set of homogeneous devices malfunction. We propose an approach to designing such networks under arbitrary parameters. We also show that the proposed approach can be used to optimize inter-router connections in network-on-chip to reduce the additional consumption of energy and time delay.
Original language | English |
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Pages (from-to) | 1154-1160 |
Number of pages | 7 |
Journal | Journal of Computer Science and Technology |
Volume | 30 |
Issue number | 5 |
DOIs | |
Publication status | Published - 22 Sept 2015 |
Externally published | Yes |
Keywords
- fault tolerance
- homogeneous fault
- network reliability
- network-on-chip
- reconfigurable system