Application of guard traces with vias in the RF PCB layout

Zhi Li; Qiang Wang; Changsheng Shi

doi:10.1109/ELMAGC.2002.1177544

Application of guard traces with vias in the RF PCB layout

Zhi Li, Qiang Wang, Changsheng Shi

Tsinghua University

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

50 Citations (Scopus)

Abstract

In this paper we discuss the affection of the guard traces(shown in Figure 3) with vias to the function of the parallel double micro-strip lines in the PCB layout, the structure of the parallel double micro-strip line is treated as a symmetrical network with 4 ports, simulation on the S parameters is processed, from the S parameters we can analyze the effect of the guard trace, then get the conclusion that the guard trace with vias is helpful to decrease the coupling strength between the double micro-strip lines.

Original language	English
Title of host publication	2002 3rd International Symposium on Electromagnetic CompatibiIity, EMC 2002
Editors	Yinghong Wen, Linchang Zhang
Publisher	Institute of Electrical and Electronics Engineers Inc.
Pages	771-774
Number of pages	4
ISBN (Electronic)	0780372778
DOIs	https://doi.org/10.1109/ELMAGC.2002.1177544
Publication status	Published - 2002
Externally published	Yes
Event	3rd International Symposium on Electromagnetic CompatibiIity, EMC 2002 - Beijing, China Duration: 21 May 2002 → 24 May 2002

Publication series

Name	IEEE International Symposium on Electromagnetic Compatibility
Volume	2002-January
ISSN (Print)	1077-4076
ISSN (Electronic)	2158-1118

Conference

Conference	3rd International Symposium on Electromagnetic CompatibiIity, EMC 2002
Country/Territory	China
City	Beijing
Period	21/05/02 → 24/05/02

Keywords

Couple
Guard trace
RF PCB vias micro-strip line standing wave
Waveguide

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10.1109/ELMAGC.2002.1177544

Cite this

Li, Z., Wang, Q., & Shi, C. (2002). Application of guard traces with vias in the RF PCB layout. In Y. Wen, & L. Zhang (Eds.), 2002 3rd International Symposium on Electromagnetic CompatibiIity, EMC 2002 (pp. 771-774). Article 1177544 (IEEE International Symposium on Electromagnetic Compatibility; Vol. 2002-January). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/ELMAGC.2002.1177544

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title = "Application of guard traces with vias in the RF PCB layout",

abstract = "In this paper we discuss the affection of the guard traces(shown in Figure 3) with vias to the function of the parallel double micro-strip lines in the PCB layout, the structure of the parallel double micro-strip line is treated as a symmetrical network with 4 ports, simulation on the S parameters is processed, from the S parameters we can analyze the effect of the guard trace, then get the conclusion that the guard trace with vias is helpful to decrease the coupling strength between the double micro-strip lines.",

keywords = "Couple, Guard trace, RF PCB vias micro-strip line standing wave, Waveguide",

author = "Zhi Li and Qiang Wang and Changsheng Shi",

note = "Publisher Copyright: {\textcopyright} 2002 IEEE.; 3rd International Symposium on Electromagnetic CompatibiIity, EMC 2002 ; Conference date: 21-05-2002 Through 24-05-2002",

year = "2002",

doi = "10.1109/ELMAGC.2002.1177544",

language = "English",

series = "IEEE International Symposium on Electromagnetic Compatibility",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

pages = "771--774",

editor = "Yinghong Wen and Linchang Zhang",

booktitle = "2002 3rd International Symposium on Electromagnetic CompatibiIity, EMC 2002",

address = "United States",

}

Li, Z, Wang, Q & Shi, C 2002, Application of guard traces with vias in the RF PCB layout. in Y Wen & L Zhang (eds), 2002 3rd International Symposium on Electromagnetic CompatibiIity, EMC 2002., 1177544, IEEE International Symposium on Electromagnetic Compatibility, vol. 2002-January, Institute of Electrical and Electronics Engineers Inc., pp. 771-774, 3rd International Symposium on Electromagnetic CompatibiIity, EMC 2002, Beijing, China, 21/05/02. https://doi.org/10.1109/ELMAGC.2002.1177544

Application of guard traces with vias in the RF PCB layout. / Li, Zhi; Wang, Qiang; Shi, Changsheng.
2002 3rd International Symposium on Electromagnetic CompatibiIity, EMC 2002. ed. / Yinghong Wen; Linchang Zhang. Institute of Electrical and Electronics Engineers Inc., 2002. p. 771-774 1177544 (IEEE International Symposium on Electromagnetic Compatibility; Vol. 2002-January).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

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AU - Li, Zhi

AU - Wang, Qiang

AU - Shi, Changsheng

PY - 2002

Y1 - 2002

N2 - In this paper we discuss the affection of the guard traces(shown in Figure 3) with vias to the function of the parallel double micro-strip lines in the PCB layout, the structure of the parallel double micro-strip line is treated as a symmetrical network with 4 ports, simulation on the S parameters is processed, from the S parameters we can analyze the effect of the guard trace, then get the conclusion that the guard trace with vias is helpful to decrease the coupling strength between the double micro-strip lines.

AB - In this paper we discuss the affection of the guard traces(shown in Figure 3) with vias to the function of the parallel double micro-strip lines in the PCB layout, the structure of the parallel double micro-strip line is treated as a symmetrical network with 4 ports, simulation on the S parameters is processed, from the S parameters we can analyze the effect of the guard trace, then get the conclusion that the guard trace with vias is helpful to decrease the coupling strength between the double micro-strip lines.

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KW - Guard trace

KW - RF PCB vias micro-strip line standing wave

KW - Waveguide

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EP - 774

BT - 2002 3rd International Symposium on Electromagnetic CompatibiIity, EMC 2002

A2 - Wen, Yinghong

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PB - Institute of Electrical and Electronics Engineers Inc.

T2 - 3rd International Symposium on Electromagnetic CompatibiIity, EMC 2002

Y2 - 21 May 2002 through 24 May 2002

ER -

Application of guard traces with vias in the RF PCB layout

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Keywords

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