An FPGA-based implementation of Fourier-Mellin Transform

This paper provides an FPGA-based implementation for Fourier-Mellin transform, proposing a single-chip solution for image registration with rotation, scaling and translation parameters. To achieve high registration accuracy, coordinates of the peak of the cross power spectrum is replaced by coordinates of the center of gravity of a peak-centered window, and a secondary detection is processed based on the results of the coarse registration. This implementation resolves the contradiction between resource utilization and processing speed through parallel processing, local pipelining, and clear pipeline management. Based on hardware-software co-design, this registration system is implemented on Zynq-7000 AP SoC XC7Z020 and achieves 90 fps when processing two grayscale images of size 256 × 256 at a frequency of 200Mhz, meeting speed and accuracy requirements of most real-time processing applications.