An FPGA-accelerated doppler parameters estimation engine for real-time synthetic aperture radar imaging system

Bingyi Li, Ying Wang, Linlin Fang, Chen He, Yizhuang Xie, Liang Chen

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

1 Citation (Scopus)

Abstract

In this paper, we demonstrate an achievable implementation of Doppler parameters estimation engine. Taking advantage of FPGA, a highly parallelized and reconfigurable structure with a unified calculation is adopted. We build a prototype using single off-the-shelf Xilinx XC6VSX315T FPGA to verify the proposed method in a 16384 × 16384 SAR imaging process. The experiment result can achieve more than 20x time speedups over CPU-based solution, and the FPGA hardware resources can be balanced.

Original languageEnglish
Title of host publicationProceedings - 2017 4th International Conference on Information Science and Control Engineering, ICISCE 2017
EditorsYing Dai, Shaozi Li, Yun Cheng
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages169-171
Number of pages3
ISBN (Electronic)9781538630136
DOIs
Publication statusPublished - 14 Nov 2017
Event4th International Conference on Information Science and Control Engineering, ICISCE 2017 - Changsha, Hunan, China
Duration: 21 Jul 201723 Jul 2017

Publication series

NameProceedings - 2017 4th International Conference on Information Science and Control Engineering, ICISCE 2017

Conference

Conference4th International Conference on Information Science and Control Engineering, ICISCE 2017
Country/TerritoryChina
CityChangsha, Hunan
Period21/07/1723/07/17

Keywords

  • Doppler parameter
  • FPGA accelerator
  • SAR

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