A ReRAM-Based Computing-in-Memory Convolutional-Macro with Customized 2T2R Bit-Cell for AIoT Chip IP Applications

Fei Tan; Yiming Wang; Yiming Yang; Liran Li; Tian Wang; Feng Zhang; Xinghua Wang; Jianfeng Gao; Yongpan Liu

doi:10.1109/TCSII.2020.3013336

A ReRAM-Based Computing-in-Memory Convolutional-Macro with Customized 2T2R Bit-Cell for AIoT Chip IP Applications

Fei Tan, Yiming Wang, Yiming Yang, Liran Li, Tian Wang, Feng Zhang^*, Xinghua Wang^*, Jianfeng Gao, Yongpan Liu

^*Corresponding author for this work

School of Integrated Circuits and Electronics

Research output: Contribution to journal › Article › peer-review

21 Citations (Scopus)

Abstract

To reduce the energy-consuming and time latency incurred by Von Neumann architecture, this brief developed a complete computing-in-memory (CIM) convolutional macro based on ReRAM array for the convolutional layers of a LeNet-like convolutional neural network (CNN). We binarized the input layer and the first convolutional layer to get higher accuracy. The proposed ReRAM-CIM convolutional macro is suitable as an IP core for any binarized neural networks' convolutional layers. This brief customized a bit-cell consisting of 2T2R ReRAM cells, regarded ${9 \times 8}$ bit-cells as one unit to achieve high hardware compute accuracy, great read/compute speed, and low power consuming. The ReRAM-CIM convolutional macro achieved 50 ns product-sum computing time for one complete convolutional operation in a convolutional layer in the customized CNN, with an accuracy of 96.96% on MNIST database and a peak energy efficiency of 58.82 TOPS/W.

Original language	English
Article number	9179148
Pages (from-to)	1534-1538
Number of pages	5
Journal	IEEE Transactions on Circuits and Systems II: Express Briefs
Volume	67
Issue number	9
DOIs	https://doi.org/10.1109/TCSII.2020.3013336
Publication status	Published - Sept 2020

Keywords

AIoT application
CNN
ReRAM
artificial intelligence
computing-in-memory
convolutional layer
edge computing

UN SDGs

This output contributes to the following UN Sustainable Development Goals (SDGs)

Access to Document

10.1109/TCSII.2020.3013336

Cite this

Tan, F., Wang, Y., Yang, Y., Li, L., Wang, T., Zhang, F., Wang, X., Gao, J., & Liu, Y. (2020). A ReRAM-Based Computing-in-Memory Convolutional-Macro with Customized 2T2R Bit-Cell for AIoT Chip IP Applications. IEEE Transactions on Circuits and Systems II: Express Briefs, 67(9), 1534-1538. Article 9179148. https://doi.org/10.1109/TCSII.2020.3013336

@article{7156a448be3e48d28159926eba717b24,

title = "A ReRAM-Based Computing-in-Memory Convolutional-Macro with Customized 2T2R Bit-Cell for AIoT Chip IP Applications",

abstract = "To reduce the energy-consuming and time latency incurred by Von Neumann architecture, this brief developed a complete computing-in-memory (CIM) convolutional macro based on ReRAM array for the convolutional layers of a LeNet-like convolutional neural network (CNN). We binarized the input layer and the first convolutional layer to get higher accuracy. The proposed ReRAM-CIM convolutional macro is suitable as an IP core for any binarized neural networks' convolutional layers. This brief customized a bit-cell consisting of 2T2R ReRAM cells, regarded ${9 \times 8}$ bit-cells as one unit to achieve high hardware compute accuracy, great read/compute speed, and low power consuming. The ReRAM-CIM convolutional macro achieved 50 ns product-sum computing time for one complete convolutional operation in a convolutional layer in the customized CNN, with an accuracy of 96.96% on MNIST database and a peak energy efficiency of 58.82 TOPS/W.",

keywords = "AIoT application, CNN, ReRAM, artificial intelligence, computing-in-memory, convolutional layer, edge computing",

author = "Fei Tan and Yiming Wang and Yiming Yang and Liran Li and Tian Wang and Feng Zhang and Xinghua Wang and Jianfeng Gao and Yongpan Liu",

note = "Publisher Copyright: {\textcopyright} 2004-2012 IEEE.",

year = "2020",

month = sep,

doi = "10.1109/TCSII.2020.3013336",

language = "English",

volume = "67",

pages = "1534--1538",

journal = "IEEE Transactions on Circuits and Systems II: Express Briefs",

issn = "1549-7747",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

number = "9",

}

TY - JOUR

T1 - A ReRAM-Based Computing-in-Memory Convolutional-Macro with Customized 2T2R Bit-Cell for AIoT Chip IP Applications

AU - Tan, Fei

AU - Wang, Yiming

AU - Yang, Yiming

AU - Li, Liran

AU - Wang, Tian

AU - Zhang, Feng

AU - Wang, Xinghua

AU - Gao, Jianfeng

AU - Liu, Yongpan

PY - 2020/9

Y1 - 2020/9

N2 - To reduce the energy-consuming and time latency incurred by Von Neumann architecture, this brief developed a complete computing-in-memory (CIM) convolutional macro based on ReRAM array for the convolutional layers of a LeNet-like convolutional neural network (CNN). We binarized the input layer and the first convolutional layer to get higher accuracy. The proposed ReRAM-CIM convolutional macro is suitable as an IP core for any binarized neural networks' convolutional layers. This brief customized a bit-cell consisting of 2T2R ReRAM cells, regarded ${9 \times 8}$ bit-cells as one unit to achieve high hardware compute accuracy, great read/compute speed, and low power consuming. The ReRAM-CIM convolutional macro achieved 50 ns product-sum computing time for one complete convolutional operation in a convolutional layer in the customized CNN, with an accuracy of 96.96% on MNIST database and a peak energy efficiency of 58.82 TOPS/W.

AB - To reduce the energy-consuming and time latency incurred by Von Neumann architecture, this brief developed a complete computing-in-memory (CIM) convolutional macro based on ReRAM array for the convolutional layers of a LeNet-like convolutional neural network (CNN). We binarized the input layer and the first convolutional layer to get higher accuracy. The proposed ReRAM-CIM convolutional macro is suitable as an IP core for any binarized neural networks' convolutional layers. This brief customized a bit-cell consisting of 2T2R ReRAM cells, regarded ${9 \times 8}$ bit-cells as one unit to achieve high hardware compute accuracy, great read/compute speed, and low power consuming. The ReRAM-CIM convolutional macro achieved 50 ns product-sum computing time for one complete convolutional operation in a convolutional layer in the customized CNN, with an accuracy of 96.96% on MNIST database and a peak energy efficiency of 58.82 TOPS/W.

KW - AIoT application

KW - CNN

KW - ReRAM

KW - artificial intelligence

KW - computing-in-memory

KW - convolutional layer

KW - edge computing

UR - http://www.scopus.com/inward/record.url?scp=85090850479&partnerID=8YFLogxK

U2 - 10.1109/TCSII.2020.3013336

DO - 10.1109/TCSII.2020.3013336

M3 - Article

AN - SCOPUS:85090850479

SN - 1549-7747

VL - 67

SP - 1534

EP - 1538

JO - IEEE Transactions on Circuits and Systems II: Express Briefs

JF - IEEE Transactions on Circuits and Systems II: Express Briefs

IS - 9

M1 - 9179148

ER -

A ReRAM-Based Computing-in-Memory Convolutional-Macro with Customized 2T2R Bit-Cell for AIoT Chip IP Applications

Abstract

Keywords

UN SDGs

Access to Document

Other files and links

Fingerprint

Cite this