A random sampling based SPM management mechanism

Energy and area of on-chip memory in embedded systems are highly regarded. Scratchpad memory(SPM) has been widely adopted as an alternative to the L1 Cache in many modern embedded processors due to its advantages on power and area efficiency. An effective SPM management strategy is of great significance for the whole system performance. Previous approaches handled the SPM management at compile time in a software manner. The development of mobile technology and the Internet diversifies the deployment of the embedded applications, which incurs huge constraints for previous SPM management. This paper proposes a new dynamic SPM management (DSPMM) strategy based on random sampling. The novelty of this method lies in its co-design of hardware and software, which can predict the most frequently accessed data items by monitoring the memory access pattern at runtime. Differing from the traditional profiling-driven and compiler-based methods, DSPMM depends neither on the assistance of the compiler, nor the profiling information beforehand. Experimental results show that, DSPMM can fully utilize the advantages of SPM on energy and area compared with the traditional cache systems. Even higher flexibility and generality can be achieved in contrast with the classical profiling-driven SPM management methods, without severe performance decrement.