A Highly Linear Low Noise Amplifier with Wide Range Derivative Superposition Method

Wei Gao; Zhiming Chen; Zicheng Liu; Wei Cui; Xiaoyan Gui

doi:10.1109/LMWC.2015.2496793

A Highly Linear Low Noise Amplifier with Wide Range Derivative Superposition Method

Wei Gao, Zhiming Chen^*, Zicheng Liu, Wei Cui, Xiaoyan Gui

^*Corresponding author for this work

Beijing Institute of Technology

Research output: Contribution to journal › Article › peer-review

16 Citations (Scopus)

Abstract

This letter presents an L-band highly linear differential low noise amplifier (LNA) in a standard 90-nm CMOS process. A wide range derivative superposition technique is proposed to maximize the third-order intercept point (IP3), and at the same time, minimize the third-order intermodulation distortion (IMD3) over a wide input power range. The LNA chip achieves a measured OIP3 of +33.7 dBm and IMD3 of-65 dBc with-15 dBm input power. The measured peak gain and minimum noise figure are 15.4 dB and 1.36 dB at 1.27 GHz, respectively. The LNA chip consumes 40 mA from a 3.3-V supply.

Original language	English
Article number	7331676
Pages (from-to)	817-819
Number of pages	3
Journal	IEEE Microwave and Wireless Components Letters
Volume	25
Issue number	12
DOIs	https://doi.org/10.1109/LMWC.2015.2496793
Publication status	Published - Dec 2015

Keywords

CMOS
IMD3
Third-order derivative cancellation
high linearity
large-signal nonlinearity
low noise amplifier (LNA)

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10.1109/LMWC.2015.2496793

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title = "A Highly Linear Low Noise Amplifier with Wide Range Derivative Superposition Method",

abstract = "This letter presents an L-band highly linear differential low noise amplifier (LNA) in a standard 90-nm CMOS process. A wide range derivative superposition technique is proposed to maximize the third-order intercept point (IP3), and at the same time, minimize the third-order intermodulation distortion (IMD3) over a wide input power range. The LNA chip achieves a measured OIP3 of +33.7 dBm and IMD3 of-65 dBc with-15 dBm input power. The measured peak gain and minimum noise figure are 15.4 dB and 1.36 dB at 1.27 GHz, respectively. The LNA chip consumes 40 mA from a 3.3-V supply.",

keywords = "CMOS, IMD3, Third-order derivative cancellation, high linearity, large-signal nonlinearity, low noise amplifier (LNA)",

author = "Wei Gao and Zhiming Chen and Zicheng Liu and Wei Cui and Xiaoyan Gui",

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T1 - A Highly Linear Low Noise Amplifier with Wide Range Derivative Superposition Method

AU - Gao, Wei

AU - Chen, Zhiming

AU - Liu, Zicheng

AU - Cui, Wei

AU - Gui, Xiaoyan

PY - 2015/12

Y1 - 2015/12

N2 - This letter presents an L-band highly linear differential low noise amplifier (LNA) in a standard 90-nm CMOS process. A wide range derivative superposition technique is proposed to maximize the third-order intercept point (IP3), and at the same time, minimize the third-order intermodulation distortion (IMD3) over a wide input power range. The LNA chip achieves a measured OIP3 of +33.7 dBm and IMD3 of-65 dBc with-15 dBm input power. The measured peak gain and minimum noise figure are 15.4 dB and 1.36 dB at 1.27 GHz, respectively. The LNA chip consumes 40 mA from a 3.3-V supply.

AB - This letter presents an L-band highly linear differential low noise amplifier (LNA) in a standard 90-nm CMOS process. A wide range derivative superposition technique is proposed to maximize the third-order intercept point (IP3), and at the same time, minimize the third-order intermodulation distortion (IMD3) over a wide input power range. The LNA chip achieves a measured OIP3 of +33.7 dBm and IMD3 of-65 dBc with-15 dBm input power. The measured peak gain and minimum noise figure are 15.4 dB and 1.36 dB at 1.27 GHz, respectively. The LNA chip consumes 40 mA from a 3.3-V supply.

KW - CMOS

KW - IMD3

KW - Third-order derivative cancellation

KW - high linearity

KW - large-signal nonlinearity

KW - low noise amplifier (LNA)

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A Highly Linear Low Noise Amplifier with Wide Range Derivative Superposition Method

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