A high-speed image acquisition system based on FPGA

Yan Mei Zhang*, Fang Jiao Chai

*Corresponding author for this work

Research output: Contribution to journalArticlepeer-review

1 Citation (Scopus)

Abstract

A hardware scheme for high-speed image acquisition system based on FPGA is proposed in this paper. The principle of high-speed, high resolution image acquisition system is described. The system design is finished based on the study of the temporary storage of burst data, the transform storage of large capacity data, the real time transmission of high-resolution and high frame frequency image and the terminal transmission of large capacity data. The testing results of designed hardware show that the system could acquire and store the high-speed and large capacity data flow, which is generated by the image sensor. Since the FPGA is used to be the core processor, the high-speed image acquisition system is simplified on its hardware structure, and the system performance is improved.

Original languageEnglish
Pages (from-to)1117-1120
Number of pages4
JournalBeijing Ligong Daxue Xuebao/Transaction of Beijing Institute of Technology
Volume30
Issue number9
Publication statusPublished - Sept 2010

Keywords

  • FPGA
  • High frame frequency
  • High-resolution

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