A high performance SoPC based digital receiver for monopulse tracking radar

Long Pang*, Bocheng Zhu, Yizhuang Xie, Teng Long

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

Abstract

In this paper, a system on programmable chip (SoPC) based implementation of digital receiver for monopulse tracking radar applications applying linear frequency modulation (LFM) signal is given. In order to meet the increased requirements of system miniaturization and low power consumption, the system function will be partitioned into several time-division stages with software or hardware implementation ways respectively, and an optimized processing structure in field programmable gate array (FPGA) is proposed to integrate all the processing procedure into single FPGA chip. In the verification part, the field experimental results indicate the validity of the system design and engineering applicability of the proposed structure.

Original languageEnglish
Title of host publicationICSP 2012 - 2012 11th International Conference on Signal Processing, Proceedings
Pages1963-1966
Number of pages4
DOIs
Publication statusPublished - 2012
Event2012 11th International Conference on Signal Processing, ICSP 2012 - Beijing, China
Duration: 21 Oct 201225 Oct 2012

Publication series

NameInternational Conference on Signal Processing Proceedings, ICSP
Volume3

Conference

Conference2012 11th International Conference on Signal Processing, ICSP 2012
Country/TerritoryChina
CityBeijing
Period21/10/1225/10/12

Keywords

  • field programmable gate array (FPGA)
  • linear frequency modulation (LFM)
  • monopulse radar
  • system on programmable chip (SoPC)
  • tracking radar

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