A FIR filter with variable order based on FPGA

Li Jiahao; Li Bingyi; Hu Shankang; Qiao Tingting; Xie Yizhuang

doi:10.1109/ICSIDP47821.2019.9173091

A FIR filter with variable order based on FPGA

Li Jiahao, Li Bingyi, Hu Shankang, Qiao Tingting, Xie Yizhuang

School of Information and Electronics

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

1 Citation (Scopus)

Abstract

Considering the low accuracy of the fixed-point FIR filter and the disadvantages of fixed filter order, a design to realize a FIR filter using floating-point with variable order based on FPGA was introduced. This kind of FIR filter realizes the function of changing orders without additional hardware resources. Using the simulation tool of Vivado and MATLAB, the relative error of the FIR filter is less than 10^-3, which indicates that this kind of FIR filter enjoys high accuracy.

Original language	English
Title of host publication	ICSIDP 2019 - IEEE International Conference on Signal, Information and Data Processing 2019
Publisher	Institute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)	9781728123455
DOIs	https://doi.org/10.1109/ICSIDP47821.2019.9173091
Publication status	Published - Dec 2019
Event	2019 IEEE International Conference on Signal, Information and Data Processing, ICSIDP 2019 - Chongqing, China Duration: 11 Dec 2019 → 13 Dec 2019

Publication series

Name	ICSIDP 2019 - IEEE International Conference on Signal, Information and Data Processing 2019

Conference

Conference	2019 IEEE International Conference on Signal, Information and Data Processing, ICSIDP 2019
Country/Territory	China
City	Chongqing
Period	11/12/19 → 13/12/19

Keywords

FIR filter
FPGA
variable order

Access to Document

10.1109/ICSIDP47821.2019.9173091

Cite this

Jiahao, L., Bingyi, L., Shankang, H., Tingting, Q., & Yizhuang, X. (2019). A FIR filter with variable order based on FPGA. In ICSIDP 2019 - IEEE International Conference on Signal, Information and Data Processing 2019 Article 9173091 (ICSIDP 2019 - IEEE International Conference on Signal, Information and Data Processing 2019). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/ICSIDP47821.2019.9173091

@inproceedings{04c7cd3893154f709e63c22c4ed7396f,

title = "A FIR filter with variable order based on FPGA",

abstract = "Considering the low accuracy of the fixed-point FIR filter and the disadvantages of fixed filter order, a design to realize a FIR filter using floating-point with variable order based on FPGA was introduced. This kind of FIR filter realizes the function of changing orders without additional hardware resources. Using the simulation tool of Vivado and MATLAB, the relative error of the FIR filter is less than 10-3, which indicates that this kind of FIR filter enjoys high accuracy.",

keywords = "FIR filter, FPGA, variable order",

author = "Li Jiahao and Li Bingyi and Hu Shankang and Qiao Tingting and Xie Yizhuang",

note = "Publisher Copyright: {\textcopyright} 2019 IEEE.; 2019 IEEE International Conference on Signal, Information and Data Processing, ICSIDP 2019 ; Conference date: 11-12-2019 Through 13-12-2019",

year = "2019",

month = dec,

doi = "10.1109/ICSIDP47821.2019.9173091",

language = "English",

series = "ICSIDP 2019 - IEEE International Conference on Signal, Information and Data Processing 2019",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

booktitle = "ICSIDP 2019 - IEEE International Conference on Signal, Information and Data Processing 2019",

address = "United States",

}

Jiahao, L, Bingyi, L, Shankang, H, Tingting, Q & Yizhuang, X 2019, A FIR filter with variable order based on FPGA. in ICSIDP 2019 - IEEE International Conference on Signal, Information and Data Processing 2019., 9173091, ICSIDP 2019 - IEEE International Conference on Signal, Information and Data Processing 2019, Institute of Electrical and Electronics Engineers Inc., 2019 IEEE International Conference on Signal, Information and Data Processing, ICSIDP 2019, Chongqing, China, 11/12/19. https://doi.org/10.1109/ICSIDP47821.2019.9173091

A FIR filter with variable order based on FPGA. / Jiahao, Li; Bingyi, Li; Shankang, Hu et al.
ICSIDP 2019 - IEEE International Conference on Signal, Information and Data Processing 2019. Institute of Electrical and Electronics Engineers Inc., 2019. 9173091 (ICSIDP 2019 - IEEE International Conference on Signal, Information and Data Processing 2019).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

TY - GEN

T1 - A FIR filter with variable order based on FPGA

AU - Jiahao, Li

AU - Bingyi, Li

AU - Shankang, Hu

AU - Tingting, Qiao

AU - Yizhuang, Xie

PY - 2019/12

Y1 - 2019/12

N2 - Considering the low accuracy of the fixed-point FIR filter and the disadvantages of fixed filter order, a design to realize a FIR filter using floating-point with variable order based on FPGA was introduced. This kind of FIR filter realizes the function of changing orders without additional hardware resources. Using the simulation tool of Vivado and MATLAB, the relative error of the FIR filter is less than 10-3, which indicates that this kind of FIR filter enjoys high accuracy.

AB - Considering the low accuracy of the fixed-point FIR filter and the disadvantages of fixed filter order, a design to realize a FIR filter using floating-point with variable order based on FPGA was introduced. This kind of FIR filter realizes the function of changing orders without additional hardware resources. Using the simulation tool of Vivado and MATLAB, the relative error of the FIR filter is less than 10-3, which indicates that this kind of FIR filter enjoys high accuracy.

KW - FIR filter

KW - FPGA

KW - variable order

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U2 - 10.1109/ICSIDP47821.2019.9173091

DO - 10.1109/ICSIDP47821.2019.9173091

M3 - Conference contribution

AN - SCOPUS:85091906857

T3 - ICSIDP 2019 - IEEE International Conference on Signal, Information and Data Processing 2019

BT - ICSIDP 2019 - IEEE International Conference on Signal, Information and Data Processing 2019

PB - Institute of Electrical and Electronics Engineers Inc.

T2 - 2019 IEEE International Conference on Signal, Information and Data Processing, ICSIDP 2019

Y2 - 11 December 2019 through 13 December 2019

ER -

Jiahao L, Bingyi L, Shankang H, Tingting Q, Yizhuang X. A FIR filter with variable order based on FPGA. In ICSIDP 2019 - IEEE International Conference on Signal, Information and Data Processing 2019. Institute of Electrical and Electronics Engineers Inc. 2019. 9173091. (ICSIDP 2019 - IEEE International Conference on Signal, Information and Data Processing 2019). doi: 10.1109/ICSIDP47821.2019.9173091

A FIR filter with variable order based on FPGA

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