Huo, Q., Yang, Y., Wang, Y., Lei, D., Fu, X., Ren, Q., Xu, X., Luo, Q., Xing, G., Chen, C., Si, X., Wu, H., Yuan, Y., Li, Q., Li, X., Wang, X., Chang, M. F., Zhang, F., & Liu, M. (2022). A computing-in-memory macro based on three-dimensional resistive random-access memory. Nature Electronics, 5(7), 469-477. https://doi.org/10.1038/s41928-022-00795-x
Huo, Qiang ; Yang, Yiming ; Wang, Yiming et al. / A computing-in-memory macro based on three-dimensional resistive random-access memory. In: Nature Electronics. 2022 ; Vol. 5, No. 7. pp. 469-477.
@article{5555be3f1c0d460784b74b03c3874ece,
title = "A computing-in-memory macro based on three-dimensional resistive random-access memory",
abstract = "Non-volatile computing-in-memory macros that are based on two-dimensional arrays of memristors are of use in the development of artificial intelligence edge devices. Scaling such systems to three-dimensional arrays could provide higher parallelism, capacity and density for the necessary vector–matrix multiplication operations. However, scaling to three dimensions is challenging due to manufacturing and device variability issues. Here we report a two-kilobit non-volatile computing-in-memory macro that is based on a three-dimensional vertical resistive random-access memory fabricated using a 55 nm complementary metal–oxide–semiconductor process. Our macro can perform 3D vector–matrix multiplication operations with an energy efficiency of 8.32 tera-operations per second per watt when the input, weight and output data are 8, 9 and 22 bits, respectively, and the bit density is 58.2 bit µm–2. We show that the macro offers more accurate brain MRI edge detection and improved inference accuracy on the CIFAR-10 dataset than conventional methods.",
author = "Qiang Huo and Yiming Yang and Yiming Wang and Dengyun Lei and Xiangqu Fu and Qirui Ren and Xiaoxin Xu and Qing Luo and Guozhong Xing and Chengying Chen and Xin Si and Hao Wu and Yiyang Yuan and Qiang Li and Xiaoran Li and Xinghua Wang and Chang, {Meng Fan} and Feng Zhang and Ming Liu",
note = "Publisher Copyright: {\textcopyright} 2022, The Author(s).",
year = "2022",
month = jul,
doi = "10.1038/s41928-022-00795-x",
language = "English",
volume = "5",
pages = "469--477",
journal = "Nature Electronics",
issn = "2520-1131",
publisher = "Nature Publishing Group",
number = "7",
}
Huo, Q, Yang, Y, Wang, Y, Lei, D, Fu, X, Ren, Q, Xu, X, Luo, Q, Xing, G, Chen, C, Si, X, Wu, H, Yuan, Y, Li, Q, Li, X, Wang, X, Chang, MF, Zhang, F & Liu, M 2022, 'A computing-in-memory macro based on three-dimensional resistive random-access memory', Nature Electronics, vol. 5, no. 7, pp. 469-477. https://doi.org/10.1038/s41928-022-00795-x
A computing-in-memory macro based on three-dimensional resistive random-access memory. / Huo, Qiang; Yang, Yiming; Wang, Yiming et al.
In:
Nature Electronics, Vol. 5, No. 7, 07.2022, p. 469-477.
Research output: Contribution to journal › Article › peer-review
TY - JOUR
T1 - A computing-in-memory macro based on three-dimensional resistive random-access memory
AU - Huo, Qiang
AU - Yang, Yiming
AU - Wang, Yiming
AU - Lei, Dengyun
AU - Fu, Xiangqu
AU - Ren, Qirui
AU - Xu, Xiaoxin
AU - Luo, Qing
AU - Xing, Guozhong
AU - Chen, Chengying
AU - Si, Xin
AU - Wu, Hao
AU - Yuan, Yiyang
AU - Li, Qiang
AU - Li, Xiaoran
AU - Wang, Xinghua
AU - Chang, Meng Fan
AU - Zhang, Feng
AU - Liu, Ming
N1 - Publisher Copyright:
© 2022, The Author(s).
PY - 2022/7
Y1 - 2022/7
N2 - Non-volatile computing-in-memory macros that are based on two-dimensional arrays of memristors are of use in the development of artificial intelligence edge devices. Scaling such systems to three-dimensional arrays could provide higher parallelism, capacity and density for the necessary vector–matrix multiplication operations. However, scaling to three dimensions is challenging due to manufacturing and device variability issues. Here we report a two-kilobit non-volatile computing-in-memory macro that is based on a three-dimensional vertical resistive random-access memory fabricated using a 55 nm complementary metal–oxide–semiconductor process. Our macro can perform 3D vector–matrix multiplication operations with an energy efficiency of 8.32 tera-operations per second per watt when the input, weight and output data are 8, 9 and 22 bits, respectively, and the bit density is 58.2 bit µm–2. We show that the macro offers more accurate brain MRI edge detection and improved inference accuracy on the CIFAR-10 dataset than conventional methods.
AB - Non-volatile computing-in-memory macros that are based on two-dimensional arrays of memristors are of use in the development of artificial intelligence edge devices. Scaling such systems to three-dimensional arrays could provide higher parallelism, capacity and density for the necessary vector–matrix multiplication operations. However, scaling to three dimensions is challenging due to manufacturing and device variability issues. Here we report a two-kilobit non-volatile computing-in-memory macro that is based on a three-dimensional vertical resistive random-access memory fabricated using a 55 nm complementary metal–oxide–semiconductor process. Our macro can perform 3D vector–matrix multiplication operations with an energy efficiency of 8.32 tera-operations per second per watt when the input, weight and output data are 8, 9 and 22 bits, respectively, and the bit density is 58.2 bit µm–2. We show that the macro offers more accurate brain MRI edge detection and improved inference accuracy on the CIFAR-10 dataset than conventional methods.
UR - http://www.scopus.com/inward/record.url?scp=85134728618&partnerID=8YFLogxK
U2 - 10.1038/s41928-022-00795-x
DO - 10.1038/s41928-022-00795-x
M3 - Article
AN - SCOPUS:85134728618
SN - 2520-1131
VL - 5
SP - 469
EP - 477
JO - Nature Electronics
JF - Nature Electronics
IS - 7
ER -
Huo Q, Yang Y, Wang Y, Lei D, Fu X, Ren Q et al. A computing-in-memory macro based on three-dimensional resistive random-access memory. Nature Electronics. 2022 Jul;5(7):469-477. doi: 10.1038/s41928-022-00795-x