Abstract
High speed divider is highly desired in the millimeter wave (mmW) frequency synthesizer design. A high operating frequency, low power consumption 90-nm CMOS programmable pulse swallow multi-modulus-divider is presented in this paper. High speed true-single-phase-clock D-flip-flop (TSPC DFF) is used in the counter in order to obtain a high operating frequency. It can operate at a frequency range from 4.1 GHz to 9.2 GHz, with a division ratio of 101–164. It has a power efficiency of 3.1 GHz/mW, and it can be used to provide a high quality reference frequency in the mmW phase-locked loop.
Original language | English |
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Article number | 1773 |
Pages (from-to) | 1-12 |
Number of pages | 12 |
Journal | Electronics (Switzerland) |
Volume | 9 |
Issue number | 11 |
DOIs | |
Publication status | Published - Nov 2020 |
Keywords
- CMOS
- Counter
- High speed
- Multi-modulus-divider
- Phase-locked loop
- Prescaler
- TSPC
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Zhao, Y., Chen, Z., Liu, Z., Li, X., & Wang, X. (2020). A 4.1 GHz–9.2 GHz programmable frequency divider for Ka Band pll frequency synthesizer. Electronics (Switzerland), 9(11), 1-12. Article 1773. https://doi.org/10.3390/electronics9111773