A 25-GHz 9-dB distributed amplifier in CMOS technology

Hua Dang*, Shun'An Zhong, Yueyang Chen, Qian Zhang

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

3 Citations (Scopus)

Abstract

A common source single-ended distributed amplifier using 0.18-m CMOS technology is presented in this paper. The four-stage DA demonstrates a relatively flat gain of 9.0 dB from 3.1GHz to 12.5GHz with less than 1.0dB ripple and a unity-gain bandwidth of 25.5GHz while the minimum value of noise figure is 3.6dB at 6.9GHz. Staggering technique is used to prevent instability. The proposed amplifier dissipates 158mW with a 1.8 V power supply.

Original languageEnglish
Title of host publication2011 International Conference on Electric Information and Control Engineering, ICEICE 2011 - Proceedings
Pages12-15
Number of pages4
DOIs
Publication statusPublished - 2011
Event2011 International Conference on Electric Information and Control Engineering, ICEICE 2011 - Wuhan, China
Duration: 15 Apr 201117 Apr 2011

Publication series

Name2011 International Conference on Electric Information and Control Engineering, ICEICE 2011 - Proceedings

Conference

Conference2011 International Conference on Electric Information and Control Engineering, ICEICE 2011
Country/TerritoryChina
CityWuhan
Period15/04/1117/04/11

Keywords

  • Artificial Transmission Lines
  • CMOS RF Integrated Circuits
  • Distributed Amplifier
  • Staggering Technique

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