Abstract
Linear frequency-modulated pulse is one of the most important large time-bandwidth product signals, but it demands large amount of calculations for digital processing. Methods to improve parallelism of FFT calculation in VLIW architecture processor are studied, and a modified fixed-point FFT algorithm is promoted to meet the need of computation speed and accuracy, the calculation error of new algorithm also analyzed. Then a high-speed real-time digital pulse compression system based on TMS320C6201 is realized. It can implement DPC processing within 124 us, which is very close to the top performance of TMS320C6201. The whole system is applied in some radar and proved stable and reliable.
| Original language | English |
|---|---|
| Pages (from-to) | 1272-1275 |
| Number of pages | 4 |
| Journal | Tien Tzu Hsueh Pao/Acta Electronica Sinica |
| Volume | 29 |
| Issue number | 9 |
| Publication status | Published - Sept 2001 |
Keywords
- Digital pulse compression
- FFT
- Linear frequency-modulated
- TMS320C6201
- VLIW