TY - GEN
T1 - FPGA implementation of digital local oscillator for digital stretch processing
AU - Jiang, Yuan
AU - Luo, Qingdan
AU - Liu, Quanhua
PY - 2013
Y1 - 2013
N2 - The stretch processing is widely used for linear frequency modulation(LFM) signals in wideband phased array radars. Conventional phased array radar cannot support wideband signals because of the frequency dispersion effects. To avoid the problem, time delay beam-steering is utilized. But it raises the cost and complexity of the system. The digital stretch processing is proposed and particularly well suited to compensate the bandwidth dispersion in digital domain. However, one of the difficulties to realize digital stretch processing is to generate the high-frequency, wideband local oscillator signals. The method of multichannel parallel digital direct chirp synthesizer (DDCS) implemented in fieldprogrammable gate array(FPGA) is discussed in the paper. The paper describes the details of multichannel echo processing, including multi-channel mixing and low-pass filtering. The design is successfully realized via Xilinx Integrated Software Environment (ISE) in Virtex6 FPGA and the simulation in Mentor Graphics ModelSim is presented to prove the validation of the design.
AB - The stretch processing is widely used for linear frequency modulation(LFM) signals in wideband phased array radars. Conventional phased array radar cannot support wideband signals because of the frequency dispersion effects. To avoid the problem, time delay beam-steering is utilized. But it raises the cost and complexity of the system. The digital stretch processing is proposed and particularly well suited to compensate the bandwidth dispersion in digital domain. However, one of the difficulties to realize digital stretch processing is to generate the high-frequency, wideband local oscillator signals. The method of multichannel parallel digital direct chirp synthesizer (DDCS) implemented in fieldprogrammable gate array(FPGA) is discussed in the paper. The paper describes the details of multichannel echo processing, including multi-channel mixing and low-pass filtering. The design is successfully realized via Xilinx Integrated Software Environment (ISE) in Virtex6 FPGA and the simulation in Mentor Graphics ModelSim is presented to prove the validation of the design.
KW - Digital direct chirp synthesizer (DDCS)
KW - Digital stretch processing
KW - Fieldprogrammable gate array(FPGA)
KW - Multichannel
KW - Wideband phased array
UR - http://www.scopus.com/inward/record.url?scp=84894553076&partnerID=8YFLogxK
U2 - 10.1049/cp.2013.0366
DO - 10.1049/cp.2013.0366
M3 - Conference contribution
AN - SCOPUS:84894553076
SN - 9781849196031
T3 - IET Conference Publications
BT - IET International Radar Conference 2013
T2 - IET International Radar Conference 2013
Y2 - 14 April 2013 through 16 April 2013
ER -