FPGA design of MB-OFDM UWB baseband system based on parallel structure

Shi Jie Ren, Xin Su, Zhan Xu*, Xiang Yuan Bu

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

Abstract

A design method of multiband orthogonal frequency division multiplexing ultra wideband (MB-OFDM UWB) baseband system using parallel structure is proposed. FPGA is used to design the transmitter and the receiver. The input of digital to analog conversion (DAC) module, the output of the analog to digital conversion (ADC) module, the synchronization module, the carrier frequency offset (CFO) estimation, and compensation module are all made up of four-channel parallel structures. The simulation results prove that, when the CFO and the sampling frequency offset (SFO) are up to ± 20 ppm, in additive white Gaussian noise (AWGN) channel, CM1 or CM2 channel, the scheme ensures the low bit error rate (BER). It is suitable for high-speed MB-OFDM UWB system.

Original languageEnglish
Title of host publicationProceedings of 2016 Chinese Intelligent Systems Conference
EditorsWeicun Zhang, Yingmin Jia, Hongbo Li, Junping Du
PublisherSpringer Verlag
Pages445-454
Number of pages10
ISBN (Print)9789811023347
DOIs
Publication statusPublished - 2016
EventInternational Conference on Chinese Intelligent Systems Conference, CISC 2016 - Xiamen, China
Duration: 1 Jan 2016 → …

Publication series

NameLecture Notes in Electrical Engineering
Volume405
ISSN (Print)1876-1100
ISSN (Electronic)1876-1119

Conference

ConferenceInternational Conference on Chinese Intelligent Systems Conference, CISC 2016
Country/TerritoryChina
CityXiamen
Period1/01/16 → …

Keywords

  • Carrier frequency offset
  • ECMA-368
  • FPGA
  • MB-OFDM UWB
  • Residual phase
  • Sampling frequency offset
  • Signal-to-noise ratio (SNR)

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