TY - GEN
T1 - Design of RVD radar if signal simulator based on FPGA
AU - Jian, Zhou
AU - Feng, Han
AU - Siliang, Wu
PY - 2009
Y1 - 2009
N2 - Spacecraft rendezvous and docking (RVD) is one of the major tasks in space flight mission. This study discusses an approach for simulating the intermediate frequency (IF) signals which the RVD radar received based on the principle of direct digital synthesizer (DDS). The velocity, distance simulation and noise generator are presented respectively. The whole simulation system was implemented on the platform of field- programmable gate array (FPGA).
AB - Spacecraft rendezvous and docking (RVD) is one of the major tasks in space flight mission. This study discusses an approach for simulating the intermediate frequency (IF) signals which the RVD radar received based on the principle of direct digital synthesizer (DDS). The velocity, distance simulation and noise generator are presented respectively. The whole simulation system was implemented on the platform of field- programmable gate array (FPGA).
KW - Direct digital synthesizer (DDS)
KW - Field-programmable gate array (FPGA)
KW - Rendezvous and docking (RVD)
KW - Signal simulator
KW - Spread spectrum
UR - http://www.scopus.com/inward/record.url?scp=84869642083&partnerID=8YFLogxK
U2 - 10.1049/cp.2009.0386
DO - 10.1049/cp.2009.0386
M3 - Conference contribution
AN - SCOPUS:84869642083
SN - 9781849190107
T3 - IET Conference Publications
BT - IET International Radar Conference 2009
T2 - IET International Radar Conference 2009
Y2 - 20 April 2009 through 22 April 2009
ER -