Abstract
Spacecraft rendezvous and docking (RVD) is one of the major tasks in space flight mission. This study discusses an approach for simulating the intermediate frequency (IF) signals which the RVD radar received based on the principle of direct digital synthesizer (DDS). The velocity, distance simulation and noise generator are presented respectively. The whole simulation system was implemented on the platform of field- programmable gate array (FPGA).
Original language | English |
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Title of host publication | IET International Radar Conference 2009 |
Edition | 551 CP |
DOIs | |
Publication status | Published - 2009 |
Event | IET International Radar Conference 2009 - Guilin, China Duration: 20 Apr 2009 → 22 Apr 2009 |
Publication series
Name | IET Conference Publications |
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Number | 551 CP |
Conference
Conference | IET International Radar Conference 2009 |
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Country/Territory | China |
City | Guilin |
Period | 20/04/09 → 22/04/09 |
Keywords
- Direct digital synthesizer (DDS)
- Field-programmable gate array (FPGA)
- Rendezvous and docking (RVD)
- Signal simulator
- Spread spectrum
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Jian, Z., Feng, H., & Siliang, W. (2009). Design of RVD radar if signal simulator based on FPGA. In IET International Radar Conference 2009 (551 CP ed.). (IET Conference Publications; No. 551 CP). https://doi.org/10.1049/cp.2009.0386