Abstract
A new method of built-in self-test of a real time digital signal processor is offered. This method is a hybrid one of board-level testing and system-level testing, could integrate system adjustment, on-line testing and off-line testing in one BIST architecture. The implementation of the BIST is offered, and the performance of the time domain processing test and frequency domain processing test are analysed.
| Original language | English |
|---|---|
| Pages | 983-986 |
| Number of pages | 4 |
| Publication status | Published - 2001 |
| Event | 2001 CIE International Conference on Radar Proceedings - Beijing, China Duration: 15 Oct 2001 → 18 Oct 2001 |
Conference
| Conference | 2001 CIE International Conference on Radar Proceedings |
|---|---|
| Country/Territory | China |
| City | Beijing |
| Period | 15/10/01 → 18/10/01 |
Keywords
- Built-in self-test
- Digital signal processor
- Testable design