An FPGA-based DS-CDMA multiuser demodulator employing adaptive multistage parallel interference cancellation

Xinhua Li*, Zhenyu Song, Yongjie Zhan, Qiongzhi Wu

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

Abstract

Since the system capacity is severely limited, reducing the multiple access interfere (MAI) is necessary in the multiuser direct-sequence code division multiple access (DS-CDMA) system which is used in the telecommunication terminals data-transferred link system. In this paper, we adopt an adaptive multistage parallel interference cancellation structure in the demodulator based on the least mean square (LMS) algorithm to eliminate the MAI on the basis of overviewing various of multiuser dectection schemes. Neither a training sequence nor a pilot signal is needed in the proposed scheme, and its implementation complexity can be greatly reduced by a LMS approximate algorithm. The algorithm and its FPGA implementation is then derived. Simulation results of the proposed adaptive PIC can outperform some of the existing interference cancellation methods in AWGN channels. The hardware setup of mutiuser demodulator is described, and the experimental results based on it demonstrate that the simulation results shows large performance gains over the conventional single-user demodulator.

Original languageEnglish
Title of host publicationInternational Conference on Space Information Technology 2009
DOIs
Publication statusPublished - 2010
EventInternational Conference on Space Information Technology 2009 - Beijing, China
Duration: 26 Nov 200927 Nov 2009

Publication series

NameProceedings of SPIE - The International Society for Optical Engineering
Volume7651
ISSN (Print)0277-786X

Conference

ConferenceInternational Conference on Space Information Technology 2009
Country/TerritoryChina
CityBeijing
Period26/11/0927/11/09

Keywords

  • CDMA
  • FPGA
  • interference cancellation
  • multiuser detection

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