An accurate compact modelling approach for statistical ageing and reliability

Jie Ding; Dave Reid; Campbell Millar; Asen Asenov

doi:10.1109/SISPAD.2013.6650573

An accurate compact modelling approach for statistical ageing and reliability

Jie Ding, Dave Reid, Campbell Millar, Asen Asenov

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

6 Citations (Scopus)

Abstract

In this paper, we demonstrate a compact modelling approach that allows statistical circuit simulation at arbitrary stages of transistor BTI ageing, using advanced compact model generation techniques implemented in the GSS statistical circuit simulation engine RandomSpice. The methodology links statistical TCAD simulations where different 'frozen in time' stages of BTI degradation are described in terms of average trapped charge density and the corresponding statistical compact models, to statistical circuit level simulations where aging is expressed in terms of time. To accomplish this task we employ an ageing model that links the average threshold voltage shift and the corresponding average trapped charge density to the aging time. We also illustrate how this method can be used to study the evolution of the SRAM static noise margin with transistor ageing.

Original language	English
Title of host publication	2013 International Conference on Simulation of Semiconductor Processes and Devices, SISPAD 2013
Pages	57-60
Number of pages	4
DOIs	https://doi.org/10.1109/SISPAD.2013.6650573
Publication status	Published - 2013
Externally published	Yes
Event	18th International Conference on Simulation of Semiconductor Processes and Devices, SISPAD 2013 - Glasgow, United Kingdom Duration: 3 Sept 2013 → 5 Sept 2013

Publication series

Name	International Conference on Simulation of Semiconductor Processes and Devices, SISPAD

Conference

Conference	18th International Conference on Simulation of Semiconductor Processes and Devices, SISPAD 2013
Country/Territory	United Kingdom
City	Glasgow
Period	3/09/13 → 5/09/13

Keywords

Ageing
Compact model
reliability

Access to Document

10.1109/SISPAD.2013.6650573

Cite this

Ding, J., Reid, D., Millar, C., & Asenov, A. (2013). An accurate compact modelling approach for statistical ageing and reliability. In 2013 International Conference on Simulation of Semiconductor Processes and Devices, SISPAD 2013 (pp. 57-60). Article 6650573 (International Conference on Simulation of Semiconductor Processes and Devices, SISPAD). https://doi.org/10.1109/SISPAD.2013.6650573

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title = "An accurate compact modelling approach for statistical ageing and reliability",

abstract = "In this paper, we demonstrate a compact modelling approach that allows statistical circuit simulation at arbitrary stages of transistor BTI ageing, using advanced compact model generation techniques implemented in the GSS statistical circuit simulation engine RandomSpice. The methodology links statistical TCAD simulations where different 'frozen in time' stages of BTI degradation are described in terms of average trapped charge density and the corresponding statistical compact models, to statistical circuit level simulations where aging is expressed in terms of time. To accomplish this task we employ an ageing model that links the average threshold voltage shift and the corresponding average trapped charge density to the aging time. We also illustrate how this method can be used to study the evolution of the SRAM static noise margin with transistor ageing.",

keywords = "Ageing, Compact model, reliability",

author = "Jie Ding and Dave Reid and Campbell Millar and Asen Asenov",

year = "2013",

doi = "10.1109/SISPAD.2013.6650573",

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booktitle = "2013 International Conference on Simulation of Semiconductor Processes and Devices, SISPAD 2013",

note = "18th International Conference on Simulation of Semiconductor Processes and Devices, SISPAD 2013 ; Conference date: 03-09-2013 Through 05-09-2013",

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Ding, J, Reid, D, Millar, C & Asenov, A 2013, An accurate compact modelling approach for statistical ageing and reliability. in 2013 International Conference on Simulation of Semiconductor Processes and Devices, SISPAD 2013., 6650573, International Conference on Simulation of Semiconductor Processes and Devices, SISPAD, pp. 57-60, 18th International Conference on Simulation of Semiconductor Processes and Devices, SISPAD 2013, Glasgow, United Kingdom, 3/09/13. https://doi.org/10.1109/SISPAD.2013.6650573

An accurate compact modelling approach for statistical ageing and reliability. / Ding, Jie; Reid, Dave; Millar, Campbell et al.
2013 International Conference on Simulation of Semiconductor Processes and Devices, SISPAD 2013. 2013. p. 57-60 6650573 (International Conference on Simulation of Semiconductor Processes and Devices, SISPAD).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

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AB - In this paper, we demonstrate a compact modelling approach that allows statistical circuit simulation at arbitrary stages of transistor BTI ageing, using advanced compact model generation techniques implemented in the GSS statistical circuit simulation engine RandomSpice. The methodology links statistical TCAD simulations where different 'frozen in time' stages of BTI degradation are described in terms of average trapped charge density and the corresponding statistical compact models, to statistical circuit level simulations where aging is expressed in terms of time. To accomplish this task we employ an ageing model that links the average threshold voltage shift and the corresponding average trapped charge density to the aging time. We also illustrate how this method can be used to study the evolution of the SRAM static noise margin with transistor ageing.

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ER -

An accurate compact modelling approach for statistical ageing and reliability

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Keywords

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