A high-performance scalable computing system for real-time signal processing applications

Xiongkui Zhang*, Guoman Liu, Meiguo Gao

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

19 Citations (Scopus)

Abstract

The Department of Electronic Engineering of Beijing Institute of Technology is integrating emerging interconnect technologies with other high-performance technologies to meet the demanding requirement of future, real-time signal processing applications. For next-generation, scalable, modular and adaptable signal-processing system, a universal, flexible and high-performance signal processing module based on TMS320C6455 and RapidIO interconnect has been developed. The TMS320C6455 is the state-of-the-art fixed-point DSP from Texas Instruments with the computing-capability of 9600MIPS. RapidIO, a switched fabric technology for board-to-board and chip-to-chip interconnect, is for interconnecting heterogeneous computing nodes in a low-latency, high-throughput and traffic-manageable way. With this versatile module, massively parallel multi-DSP computing system is feasible. In this paper, a prototype of 3 modules with 12 TMS320C6455s aggregated by Serial RapidIO is introduced and an application of this computing system in radar jamming system is briefly covered.

Original languageEnglish
Title of host publicationProceedings - 1st International Congress on Image and Signal Processing, CISP 2008
Pages556-560
Number of pages5
DOIs
Publication statusPublished - 2008
Event1st International Congress on Image and Signal Processing, CISP 2008 - Sanya, Hainan, China
Duration: 27 May 200830 May 2008

Publication series

NameProceedings - 1st International Congress on Image and Signal Processing, CISP 2008
Volume2

Conference

Conference1st International Congress on Image and Signal Processing, CISP 2008
Country/TerritoryChina
CitySanya, Hainan
Period27/05/0830/05/08

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