基于 QualNet 的无人机信息攻击半实物测试架构设计与实现

Translated title of the contribution: Design and Implementation of Hardware-in-the-loop Test Architecture for UAV Information Attack Based on QualNet

Siqi Li, Peng Gong, Dan Shan, Jianfeng Li, Yu Liu, Xiang Gao*

*Corresponding author for this work

Research output: Contribution to journalArticlepeer-review

Abstract

To meet the requirements of data link interference attack effect simulation in UAV technology research, a hardware-in-the-loop test architecture for UAV information attack is proposed based on QualNet simulation software. The hardware-in-the-loop test architecture simulates the dynamic control, state information display, and jamming attack loading in UAVs. It integrates data transmission interface and various modules including communication network simulation, scenario planning, jamming attack simulation loading, three dimensional situation display, and dynamic control modules. Test results demonstrate that the architecture can effectively simulate the interference attack effects on UAVs. The designed command data interaction interface ensures accurate and real-time communication in the hardware-in-the-loop test for UAV information attacks, laying a foundation for physical equipment access testing.

Translated title of the contributionDesign and Implementation of Hardware-in-the-loop Test Architecture for UAV Information Attack Based on QualNet
Original languageChinese (Traditional)
Pages (from-to)2709-2721
Number of pages13
JournalBinggong Xuebao/Acta Armamentarii
Volume44
Issue number9
DOIs
Publication statusPublished - 20 Sept 2023

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