摘要
A novel silicon-insulator-silicon through-silicon-via (TSV) using ultra-low-resistivity silicon pillar as the conductor, while polymer benzocyclobutene as an insulation layer was successfully fabricated. With the help of on-wafer deembedding structure and vector network analyzer, wideband parasitic capacitance characteristics of a single TSV were accurately measured. Results show that stable capacitance over frequency (up to 50 GHz) and operation voltage (-20-20 V) is obtained with good wafer-level uniformity. Compared with the conventional Cu core TSV, the proposed structure not only exhibits a small and stable capacitance, but also involves a much simpler and cost-effective process flow.
| 源语言 | 英语 |
|---|---|
| 期刊论文编号 | 7349106 |
| 页(从-至) | 216-219 |
| 页数 | 4 |
| 期刊 | IEEE Electron Device Letters |
| 卷 | 37 |
| 期 | 2 |
| DOI | |
| 出版状态 | 已出版 - 1 2月 2016 |
学术指纹
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