TY - JOUR
T1 - Wenquxing 22
T2 - A Highly Efficient Neuromorphic Accelerator by RISC-V Customized Instruction Extension for Spiking Neural Network (RV-SNN 1.0), Streamlined LIF Model and Binary Stochastic STDP
AU - Wang, Jiulong
AU - Zong, Jixiang
AU - Wu, Ruopu
AU - Liu, Boran
AU - Chen, Xuhao
AU - Chen, Guokai
AU - Zhao, Di
AU - Wang, Deming
N1 - Publisher Copyright:
© 2015 Chinese Institute of Electronics.
PY - 2026/3/1
Y1 - 2026/3/1
N2 - This paper proposes Wenquxing 22: A neuromorphic processor to efficiently compute a spiking neural network (SNN) with RISC-V extension instructions. The main idea of Wenquxing 22 is to integrate the SNN computing unit into the pipeline of a generic in-order processor to achieve neuromorphic computing by customized RISC-V SNN instruction extensions 1.0 (RV-SNN 1.0). To integrate the leaky integrate-and-fire (LIF) model into the in-order processor, we prune the complex traditional LIF model called the streamlined LIF model, and apply it to the pipeline. The binary stochastic spike-timing-dependent-plasticity (STDP) with binary synaptic weights is also proposed to achieve the power efficiency of Wenquxing 22. The experimental results show that, on Xilinx Alveo U250, working in 300 MHz with pure 1-bit 2-layer SNN, the effective peak power efficiency of Wenquxing 22 reaches 2.4 TSOPS/W (tera synaptic operations per second per Watt) and the area efficiency reaches 339.9 SOP/LUT (synaptic operations per look up table); the peak classification accuracy on modified national institute of standards and technology database (MNIST) is 95.75%. We also evaluate the power consumption of physical chip of Wenquxing 22 on Development Board, and the result is 2.48 W. Wenquxing 22 outperforms than the existing open-source spiking systems.
AB - This paper proposes Wenquxing 22: A neuromorphic processor to efficiently compute a spiking neural network (SNN) with RISC-V extension instructions. The main idea of Wenquxing 22 is to integrate the SNN computing unit into the pipeline of a generic in-order processor to achieve neuromorphic computing by customized RISC-V SNN instruction extensions 1.0 (RV-SNN 1.0). To integrate the leaky integrate-and-fire (LIF) model into the in-order processor, we prune the complex traditional LIF model called the streamlined LIF model, and apply it to the pipeline. The binary stochastic spike-timing-dependent-plasticity (STDP) with binary synaptic weights is also proposed to achieve the power efficiency of Wenquxing 22. The experimental results show that, on Xilinx Alveo U250, working in 300 MHz with pure 1-bit 2-layer SNN, the effective peak power efficiency of Wenquxing 22 reaches 2.4 TSOPS/W (tera synaptic operations per second per Watt) and the area efficiency reaches 339.9 SOP/LUT (synaptic operations per look up table); the peak classification accuracy on modified national institute of standards and technology database (MNIST) is 95.75%. We also evaluate the power consumption of physical chip of Wenquxing 22 on Development Board, and the result is 2.48 W. Wenquxing 22 outperforms than the existing open-source spiking systems.
KW - Binary stochastic STDP
KW - Neuromorphic accelerator
KW - RISC-V customized instruction extension
KW - Spiking neural network
KW - Streamlined LIF model
UR - https://www.scopus.com/pages/publications/105041960337
U2 - 10.23919/cje.2024.00.309
DO - 10.23919/cje.2024.00.309
M3 - Article
AN - SCOPUS:105041960337
SN - 1022-4653
VL - 35
SP - 453
EP - 461
JO - Chinese Journal of Electronics
JF - Chinese Journal of Electronics
IS - 2
ER -