@inproceedings{40a1eb62bcc84849a7dd2b9982fa4a82,
title = "Statistical simulations of 6T-SRAM cell ageing using a reliability aware simulation flow",
abstract = "This work present the last development of a statistical reliability aware simulation flow from transistors to circuits. A TCAD calibration methodology based on statistical measurement of a 60nm bulk MOSFET is presented. Statistical compact models of fresh and aged transistors are extracted form large ensembles of TCAD simulations results. Compact models representing intermediate stages of degradation, not captured in the TCAD simulations, are interpolated using a proprietary compact model generator. Statistical simulations results for a 6T-SRAM cell aging are presented following various aging scenario for both static noise margin and intrinsic write time.",
keywords = "Aging, Degradation, Integrated circuit modeling, MOS devices, Semiconductor process modeling, Threshold voltage, Transistors",
author = "Razaidi Hussin and Louis Gerrer and Jie Ding and Liping Wang and Amoroso, \{Salvatore M.\} and Binjie Cheng and Dave Reid and Pieter Weckx and Marco Simicic and Jacopo Franco and Annelies Vanderheyden and Danielle Vanhaeren and Naoto Horiguchi and Ben Kaczer and Asen Asenov",
note = "Publisher Copyright: {\textcopyright} 2015 IEEE.; 45th European Solid-State Device Research Conference, ESSDERC 2015 ; Conference date: 14-09-2015 Through 18-09-2015",
year = "2015",
month = nov,
day = "10",
doi = "10.1109/ESSDERC.2015.7324758",
language = "English",
series = "European Solid-State Device Research Conference",
publisher = "Editions Frontieres",
pages = "238--241",
editor = "Tibor Grasser and Wolfgang Pribyl and Martin Schrems",
booktitle = "ESSDERC 2015 - Proceedings of the 45th European Solid-State Device Research Conference",
}