TY - GEN
T1 - Multilevel pattern matching architecture for network intrusion detection and prevention system
AU - Song, Tian
AU - Tang, Zhizhong
AU - Wang, Dongsheng
PY - 2007
Y1 - 2007
N2 - Pattern matching is one of the most performance critical components in network intrusion detection and prevention system, which needs to be accelerated by carefully designed architectures. In this paper, we present a highly parameterized multilevel pattern matching architecture (MPM), which is implemented on FPGA by exploiting redundant resources among patterns for less chip area. In practice, MPM can be partitioned to several pipelines for high frequency. This paper also presents a pattern set compiler that can generate RTL codes of MPM with the given pattern set and predefined parameters. One MPM architecture is generated by our compiler based on Snort rules on Xilinx FPGA. The results show that MPM can achieve 4.3Gbps throughput with only 0.22 slices per character, about one half chip area than the most area-efficient architecture in literature. MPM can be parameterized potential for more than 100 Gbps throughput.
AB - Pattern matching is one of the most performance critical components in network intrusion detection and prevention system, which needs to be accelerated by carefully designed architectures. In this paper, we present a highly parameterized multilevel pattern matching architecture (MPM), which is implemented on FPGA by exploiting redundant resources among patterns for less chip area. In practice, MPM can be partitioned to several pipelines for high frequency. This paper also presents a pattern set compiler that can generate RTL codes of MPM with the given pattern set and predefined parameters. One MPM architecture is generated by our compiler based on Snort rules on Xilinx FPGA. The results show that MPM can achieve 4.3Gbps throughput with only 0.22 slices per character, about one half chip area than the most area-efficient architecture in literature. MPM can be parameterized potential for more than 100 Gbps throughput.
UR - https://www.scopus.com/pages/publications/38749092267
U2 - 10.1007/978-3-540-72685-2_56
DO - 10.1007/978-3-540-72685-2_56
M3 - Conference contribution
AN - SCOPUS:38749092267
SN - 3540726845
SN - 9783540726845
T3 - Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)
SP - 604
EP - 614
BT - Embedded Software and Systems - Third International Conference, ICESS 2007, Proceedings
PB - Springer Verlag
T2 - 3rd International Conference on Embedded Software and Systems, ICESS 2007
Y2 - 14 May 2007 through 16 May 2007
ER -