Modular Inversion Architecture over GF(2^m) Using Optimal Exponentiation Blocks for ECC Cryptosystems

The inversion over GF(2^m) is crucial for elliptic curve cryptography algorithms such as ECDSA and SM2. The Itoh-Tsujii's Algorithm (ITA) can compute inversions in a sequential procedure by utilizing multiplications and exponentiations. This paper proposes a series of novel low-latency architectures with Cascaded Exponentiation Blocks (CEBs) and then derives the estimated clock cycle latency. The complexity of CEBs is evaluated by the matrix weight. We also employ a movable internal pipeline stage to optimize the critical path. Experiments on the Virtex-7 FPGA show the optimal exponentiation blocks for GF(2¹⁶³), GF(2²⁸³) and GF(2⁵⁷¹), respectively. Compared with existing works, both the performance and latency of our proposed architecture with OEBs are at the cutting edge.