摘要
Timing analysis presents a significant threat to cryptographic modules. However, traditional timing leakage analysis has notable limitations, especially when precise execution times cannot be obtained. In this article, we propose a novel timing leakage analysis method that leverages horizontal leakage in the power/electromagnetic channel by detecting the trace length of encryption processes under varying inputs. To demonstrate the effectiveness of our approach, we conducted systematic experimental evaluations across a range of cryptographic devices. In comparison to timing leakage analysis based on plaintext-ciphertext correlation, our method offers higher accuracy at lower testing costs and exhibits improved resistance to vertical noise.
| 源语言 | 英语 |
|---|---|
| 页(从-至) | 4048-4052 |
| 页数 | 5 |
| 期刊 | IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems |
| 卷 | 44 |
| 期 | 10 |
| DOI | |
| 出版状态 | 已出版 - 2025 |
| 已对外发布 | 是 |
学术指纹
探究 'Make It Easy! Timing Leakage Analysis on Cryptographic Chips Based on Horizontal Leakage' 的科研主题。它们共同构成独一无二的学术指纹。引用此
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