@inproceedings{bc1fdb9bbd464b2eae73cd011271ee22,
title = "Low-Cost 1-Bit Coding Array with Planar Phase-Delay-Line",
abstract = "In this paper, the analyses and designs of the 1-bit coding array with planar phase-delay-line (PDL) are presented. Firstly, the phenomenon of that the 1-bit coding array with spatial feed has no grating lobe while the 1-bit coding array with integrated feed has grating lobe are studied. The idea of using planar PDL to mitigate the grating lobe of the 1-bit coding array with integrated feed is proposed. The planar PDL, which can be integrated with the feeding structure, does not increase the profile of the array. Then, the planar PDL is applied to designs of the 1-bit linear coding array for ID scanning and the 1-bit planar coding array for 2D scanning. Grating lobes of the 1-bit coding array for ID and 2D scanning are mitigated which can show the feasibility of the planar PDL. The proposed 1-bit coding array with planar PDL has a low profile while its grating lobe is mitigated which is promising for practical applications.",
keywords = "1-bit, coding array, grating lobe, planar phase-delay-line (PDL)",
author = "Yan Wang and Feng Xu",
note = "Publisher Copyright: {\textcopyright} 2022 IEEE.; 2022 International Applied Computational Electromagnetics Society Symposium, ACES-China 2022 ; Conference date: 09-12-2022 Through 12-12-2022",
year = "2022",
doi = "10.1109/ACES-China56081.2022.10065352",
language = "English",
series = "2022 International Applied Computational Electromagnetics Society Symposium, ACES-China 2022",
publisher = "Institute of Electrical and Electronics Engineers Inc.",
booktitle = "2022 International Applied Computational Electromagnetics Society Symposium, ACES-China 2022",
address = "United States",
}