TY - JOUR
T1 - Fast location of opens in TSV-based 3-D chip using simple resistor chain
AU - Hu, Sanming
AU - Jin, Cheng
AU - Li, Hongyu
AU - Li, Rui
AU - Chong, Ser Choong
AU - Jong, Ming Chinq
AU - Wai, Eva Leong Ching
AU - Teo, Keng Hwa
AU - Je, Minkyu
AU - Lo, Patrick Guo Qiang
PY - 2014/7
Y1 - 2014/7
N2 - This brief proposes an electrical method using simple resistor chain in parallel to quickly locate open circuits in a 3-D chip. This method is theoretically analyzed using the equivalent circuit, and experimentally validated by a 3-D integrated circuit (3-D IC). The fabricated 3-D IC consists of one printed circuit board, one organic substrate, and seven 65-nm CMOS dies stacked using microbumps and through-silicon vias. Results show that, the proposed parallel resistor chain can efficiently locate opens in a complicated 3-D IC within several minutes, using the resistance measured by power supply or multimeter only.
AB - This brief proposes an electrical method using simple resistor chain in parallel to quickly locate open circuits in a 3-D chip. This method is theoretically analyzed using the equivalent circuit, and experimentally validated by a 3-D integrated circuit (3-D IC). The fabricated 3-D IC consists of one printed circuit board, one organic substrate, and seven 65-nm CMOS dies stacked using microbumps and through-silicon vias. Results show that, the proposed parallel resistor chain can efficiently locate opens in a complicated 3-D IC within several minutes, using the resistance measured by power supply or multimeter only.
KW - 3-D integrated circuit (3-D IC)
KW - location
KW - open
KW - parallel resistor chain
KW - through silicon via (TSV).
UR - https://www.scopus.com/pages/publications/84903276292
U2 - 10.1109/TED.2014.2321453
DO - 10.1109/TED.2014.2321453
M3 - Article
AN - SCOPUS:84903276292
SN - 0018-9383
VL - 61
SP - 2584
EP - 2587
JO - IEEE Transactions on Electron Devices
JF - IEEE Transactions on Electron Devices
IS - 7
M1 - 6817584
ER -