TY - JOUR
T1 - Design and Simulation of Low-Orbit Satellite Broadcast Signal Receiving and Processing Terminal
AU - Shen, Haoran
AU - Li, Jian
AU - Wang, Ziwei
N1 - Publisher Copyright:
© 2024 by the authors.
PY - 2024/8
Y1 - 2024/8
N2 - As an important space-based intelligence acquisition and combat command receiving component, the low-orbit satellite broadcast signal receiving terminal is an important guarantee for realizing the full-dimensional joint operations of our military’s multi-services. This design is based on the SoC platform. Compared to the traditional low-orbit reconnaissance satellite reception and processing terminal business process, a narrowband anti-interference module is added and the interference-to-signal ratio reaches 57 dB and 47 dB when resisting interference from a single frequency band and three frequency bands, respectively. Digital beamforming is used for signal processing and beamforming gain of the whole machine reaches 14–15 dBic; compared to traditional capture and tracking modules, this terminal uses a time domain parallel frequency domain FFT fast acquisition method and a bit synchronization loop is added to the tracking loop to aiming at the problem that the frequency signal acquisition speed is not fast enough and addressing the issue that information symbol rate is not an integer multiple of the pseudo-code, thus complete bit synchronization within 60 ms, with a bit error rate of 0; the coding gain can reach 7 dB. Combined with the solution of decoding and positioning solution algorithms, this scheme used the JFM7K325T chip to complete the design simulation of the complete receiving and processing terminal.
AB - As an important space-based intelligence acquisition and combat command receiving component, the low-orbit satellite broadcast signal receiving terminal is an important guarantee for realizing the full-dimensional joint operations of our military’s multi-services. This design is based on the SoC platform. Compared to the traditional low-orbit reconnaissance satellite reception and processing terminal business process, a narrowband anti-interference module is added and the interference-to-signal ratio reaches 57 dB and 47 dB when resisting interference from a single frequency band and three frequency bands, respectively. Digital beamforming is used for signal processing and beamforming gain of the whole machine reaches 14–15 dBic; compared to traditional capture and tracking modules, this terminal uses a time domain parallel frequency domain FFT fast acquisition method and a bit synchronization loop is added to the tracking loop to aiming at the problem that the frequency signal acquisition speed is not fast enough and addressing the issue that information symbol rate is not an integer multiple of the pseudo-code, thus complete bit synchronization within 60 ms, with a bit error rate of 0; the coding gain can reach 7 dB. Combined with the solution of decoding and positioning solution algorithms, this scheme used the JFM7K325T chip to complete the design simulation of the complete receiving and processing terminal.
KW - acquisition tracking
KW - beam synthesis
KW - bit synchronization loop
KW - simulation design
KW - time–frequency domain interference suppression
UR - https://www.scopus.com/pages/publications/85202675259
U2 - 10.3390/electronics13163270
DO - 10.3390/electronics13163270
M3 - Article
AN - SCOPUS:85202675259
SN - 2079-9292
VL - 13
JO - Electronics (Switzerland)
JF - Electronics (Switzerland)
IS - 16
M1 - 3270
ER -