Co-SEC: An Adaptive Security-Enhanced ASCON Accelerator via Algorithm-Hardware Co-Design

Internet of Things (IoT) devices in open environments are vulnerable to physical attacks on their cryptographic keys, while facing diverse and ever-changing application requirements. To address these issues, this paper proposes CO-SEC, an adaptive and security enhanced ASCON accelerator. CO-SEC integrates a physical unclonable function (PUF) to provide secondary encryption for the original key to thwart physical attacks. Furthermore, by introducing a folding factor and leveraging algorithm-hardware co-design, CO-SEC realizes an adaptively parameterized, run-time reconfigurable dataflow, thereby achieving hardware adaptability across different IoT application scenarios. Experimental results show that CO-SEC achieves a throughput improvement of 1.55-7.57× while maintaining key security above 99.99%.